mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-26 12:50:30 +00:00
Re-commit r247216: "Fix Clang-tidy misc-use-override warnings, other minor fixes"
Except the changes that defined virtual destructors as =default, because that ran into problems with GCC 4.7 and overriding methods that weren't noexcept. llvm-svn: 247298
This commit is contained in:
parent
b86ce4aaaf
commit
4583e4a824
@ -1,4 +1,4 @@
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//===- MIRParser.h - MIR serialization format parser ----------------------===//
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//===- MIRParser.h - MIR serialization format parser ------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -37,7 +37,7 @@ class MIRParser : public MachineFunctionInitializer {
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public:
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MIRParser(std::unique_ptr<MIRParserImpl> Impl);
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MIRParser(const MIRParser &) = delete;
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~MIRParser();
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~MIRParser() override;
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/// Parse the optional LLVM IR module that's embedded in the MIR file.
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///
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@ -78,4 +78,4 @@ createMIRParser(std::unique_ptr<MemoryBuffer> Contents, LLVMContext &Context);
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} // end namespace llvm
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#endif
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#endif // LLVM_CODEGEN_MIRPARSER_MIRPARSER_H
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@ -69,7 +69,8 @@ public:
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virtual object::OwningBinary<object::ObjectFile>
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getObjectForDebug(const object::ObjectFile &Obj) const = 0;
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uint64_t getSectionLoadAddress(const object::SectionRef &Sec) const;
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uint64_t
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getSectionLoadAddress(const object::SectionRef &Sec) const override;
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protected:
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virtual void anchor();
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@ -252,4 +253,4 @@ private:
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} // end namespace llvm
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#endif
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#endif // LLVM_EXECUTIONENGINE_RUNTIMEDYLD_H
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@ -536,9 +536,9 @@ class buffer_ostream : public raw_svector_ostream {
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public:
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buffer_ostream(raw_ostream &OS) : raw_svector_ostream(Buffer), OS(OS) {}
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~buffer_ostream() { OS << str(); }
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~buffer_ostream() override { OS << str(); }
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};
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} // end llvm namespace
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#endif
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#endif // LLVM_SUPPORT_RAW_OSTREAM_H
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@ -366,7 +366,7 @@ class TypedInit : public Init {
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protected:
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explicit TypedInit(InitKind K, RecTy *T) : Init(K), Ty(T) {}
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~TypedInit() {
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~TypedInit() override {
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// If this is a DefInit we need to delete the RecordRecTy.
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if (getKind() == IK_DefInit)
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delete Ty;
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@ -1587,6 +1587,6 @@ Init *QualifyName(Record &CurRec, MultiClass *CurMultiClass,
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Init *QualifyName(Record &CurRec, MultiClass *CurMultiClass,
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const std::string &Name, const std::string &Scoper);
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} // End llvm namespace
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} // end llvm namespace
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#endif
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#endif // LLVM_TABLEGEN_RECORD_H
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@ -40,7 +40,7 @@ struct MIRPrintingPass : public MachineFunctionPass {
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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virtual bool runOnMachineFunction(MachineFunction &MF) override {
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bool runOnMachineFunction(MachineFunction &MF) override {
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std::string Str;
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raw_string_ostream StrOS(Str);
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printMIR(StrOS, MF);
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@ -48,7 +48,7 @@ struct MIRPrintingPass : public MachineFunctionPass {
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return false;
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}
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virtual bool doFinalization(Module &M) override {
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bool doFinalization(Module &M) override {
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printMIR(OS, M);
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OS << MachineFunctions;
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return false;
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@ -223,12 +223,13 @@ public:
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/// FindFunctionNamed - Search all of the active modules to find the function that
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/// defines FnName. This is very slow operation and shouldn't be used for
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/// general code.
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virtual Function *FindFunctionNamed(const char *FnName) override;
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Function *FindFunctionNamed(const char *FnName) override;
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/// FindGlobalVariableNamed - Search all of the active modules to find the global variable
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/// that defines Name. This is very slow operation and shouldn't be used for
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/// general code.
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virtual GlobalVariable *FindGlobalVariableNamed(const char *Name, bool AllowInternal = false) override;
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/// FindGlobalVariableNamed - Search all of the active modules to find the
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/// global variable that defines Name. This is very slow operation and
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/// shouldn't be used for general code.
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GlobalVariable *FindGlobalVariableNamed(const char *Name,
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bool AllowInternal = false) override;
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/// Sets the object manager that MCJIT should use to avoid compilation.
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void setObjectCache(ObjectCache *manager) override;
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@ -335,6 +336,6 @@ protected:
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bool CheckFunctionsOnly);
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};
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} // End llvm namespace
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} // end llvm namespace
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#endif
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#endif // LLVM_LIB_EXECUTIONENGINE_MCJIT_MCJIT_H
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@ -185,14 +185,14 @@ public:
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X86AddressSanitizer(const MCSubtargetInfo &STI)
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: X86AsmInstrumentation(STI), RepPrefix(false), OrigSPOffset(0) {}
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virtual ~X86AddressSanitizer() {}
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~X86AddressSanitizer() override {}
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// X86AsmInstrumentation implementation:
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virtual void InstrumentAndEmitInstruction(const MCInst &Inst,
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OperandVector &Operands,
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MCContext &Ctx,
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const MCInstrInfo &MII,
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MCStreamer &Out) override {
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void InstrumentAndEmitInstruction(const MCInst &Inst,
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OperandVector &Operands,
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MCContext &Ctx,
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const MCInstrInfo &MII,
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MCStreamer &Out) override {
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InstrumentMOVS(Inst, Operands, Ctx, MII, Out);
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if (RepPrefix)
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EmitInstruction(Out, MCInstBuilder(X86::REP_PREFIX));
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@ -506,7 +506,7 @@ public:
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X86AddressSanitizer32(const MCSubtargetInfo &STI)
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: X86AddressSanitizer(STI) {}
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virtual ~X86AddressSanitizer32() {}
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~X86AddressSanitizer32() override {}
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unsigned GetFrameReg(const MCContext &Ctx, MCStreamer &Out) {
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unsigned FrameReg = GetFrameRegGeneric(Ctx, Out);
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@ -535,9 +535,9 @@ public:
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OrigSPOffset += 4;
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}
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virtual void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override {
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void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override {
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unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i32);
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assert(LocalFrameReg != X86::NoRegister);
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@ -565,9 +565,9 @@ public:
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StoreFlags(Out);
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}
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virtual void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override {
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void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override {
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unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i32);
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assert(LocalFrameReg != X86::NoRegister);
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@ -586,18 +586,18 @@ public:
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}
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}
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virtual void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
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bool IsWrite,
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const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override;
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virtual void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
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bool IsWrite,
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const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override;
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virtual void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
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MCStreamer &Out) override;
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void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
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bool IsWrite,
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const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override;
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void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
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bool IsWrite,
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const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override;
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void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
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MCStreamer &Out) override;
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private:
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void EmitCallAsanReport(unsigned AccessSize, bool IsWrite, MCContext &Ctx,
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@ -763,7 +763,7 @@ public:
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X86AddressSanitizer64(const MCSubtargetInfo &STI)
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: X86AddressSanitizer(STI) {}
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virtual ~X86AddressSanitizer64() {}
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~X86AddressSanitizer64() override {}
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unsigned GetFrameReg(const MCContext &Ctx, MCStreamer &Out) {
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unsigned FrameReg = GetFrameRegGeneric(Ctx, Out);
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@ -792,9 +792,9 @@ public:
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OrigSPOffset += 8;
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}
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virtual void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override {
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void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override {
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unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i64);
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assert(LocalFrameReg != X86::NoRegister);
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@ -823,9 +823,9 @@ public:
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StoreFlags(Out);
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}
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virtual void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override {
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void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override {
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unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i64);
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assert(LocalFrameReg != X86::NoRegister);
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@ -845,18 +845,18 @@ public:
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}
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}
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virtual void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
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bool IsWrite,
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const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override;
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virtual void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
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bool IsWrite,
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const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override;
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virtual void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
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MCStreamer &Out) override;
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void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
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bool IsWrite,
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const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override;
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void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
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bool IsWrite,
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const RegisterContext &RegCtx,
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MCContext &Ctx,
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MCStreamer &Out) override;
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void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
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MCStreamer &Out) override;
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private:
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void EmitAdjustRSP(MCContext &Ctx, MCStreamer &Out, long Offset) {
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@ -1080,4 +1080,4 @@ CreateX86AsmInstrumentation(const MCTargetOptions &MCOptions,
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return new X86AsmInstrumentation(STI);
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}
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} // End llvm namespace
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} // end llvm namespace
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initializeSafeStackPass(*PassRegistry::getPassRegistry());
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.addRequired<AAResultsWrapperPass>();
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}
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virtual bool doInitialization(Module &M) {
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bool doInitialization(Module &M) override {
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DL = &M.getDataLayout();
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StackPtrTy = Type::getInt8PtrTy(M.getContext());
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@ -235,8 +235,7 @@ public:
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return false;
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}
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bool runOnFunction(Function &F);
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bool runOnFunction(Function &F) override;
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}; // class SafeStack
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Constant *SafeStack::getOrCreateUnsafeStackPtr(Module &M) {
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@ -1,4 +1,4 @@
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//===- InstrInfoEmitter.cpp - Generate a Instruction Set Desc. ------------===//
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//===- InstrInfoEmitter.cpp - Generate a Instruction Set Desc. --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -12,7 +12,6 @@
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//
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//===----------------------------------------------------------------------===//
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#include "CodeGenDAGPatterns.h"
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#include "CodeGenSchedule.h"
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#include "CodeGenTarget.h"
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@ -26,6 +25,7 @@
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#include <cstdio>
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#include <map>
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#include <vector>
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using namespace llvm;
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namespace {
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@ -70,7 +70,7 @@ private:
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void EmitOperandInfo(raw_ostream &OS, OperandInfoMapTy &OperandInfoIDs);
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std::vector<std::string> GetOperandInfo(const CodeGenInstruction &Inst);
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};
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} // End anonymous namespace
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} // end anonymous namespace
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static void PrintDefList(const std::vector<Record*> &Uses,
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unsigned Num, raw_ostream &OS) {
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@ -190,7 +190,6 @@ void InstrInfoEmitter::EmitOperandInfo(raw_ostream &OS,
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}
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}
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/// Initialize data structures for generating operand name mappings.
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///
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/// \param Operands [out] A map used to generate the OpName enum with operand
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@ -257,9 +256,9 @@ void InstrInfoEmitter::emitOperandNameMappings(raw_ostream &OS,
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OS << "OPERAND_LAST";
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OS << "\n};\n";
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OS << "} // End namespace OpName\n";
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OS << "} // End namespace " << Namespace << "\n";
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OS << "} // End namespace llvm\n";
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OS << "} // end namespace OpName\n";
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OS << "} // end namespace " << Namespace << "\n";
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OS << "} // end namespace llvm\n";
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OS << "#endif //GET_INSTRINFO_OPERAND_ENUM\n";
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OS << "#ifdef GET_INSTRINFO_NAMED_OPS\n";
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@ -298,8 +297,8 @@ void InstrInfoEmitter::emitOperandNameMappings(raw_ostream &OS,
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OS << " return -1;\n";
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}
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OS << "}\n";
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OS << "} // End namespace " << Namespace << "\n";
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OS << "} // End namespace llvm\n";
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OS << "} // end namespace " << Namespace << "\n";
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OS << "} // end namespace llvm\n";
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OS << "#endif //GET_INSTRINFO_NAMED_OPS\n";
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}
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@ -328,9 +327,9 @@ void InstrInfoEmitter::emitOperandTypesEnum(raw_ostream &OS,
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}
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OS << " OPERAND_TYPE_LIST_END" << "\n};\n";
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OS << "} // End namespace OpTypes\n";
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OS << "} // End namespace " << Namespace << "\n";
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OS << "} // End namespace llvm\n";
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OS << "} // end namespace OpTypes\n";
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OS << "} // end namespace " << Namespace << "\n";
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OS << "} // end namespace llvm\n";
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OS << "#endif // GET_INSTRINFO_OPERAND_TYPES_ENUM\n";
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}
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@ -419,7 +418,7 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
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<< TargetName << "InstrNameIndices, " << TargetName << "InstrNameData, "
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<< NumberedInstructions.size() << ");\n}\n\n";
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OS << "} // End llvm namespace \n";
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OS << "} // end llvm namespace \n";
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OS << "#endif // GET_INSTRINFO_MC_DESC\n\n";
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@ -432,9 +431,9 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
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OS << "struct " << ClassName << " : public TargetInstrInfo {\n"
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<< " explicit " << ClassName
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<< "(int CFSetupOpcode = -1, int CFDestroyOpcode = -1);\n"
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<< " virtual ~" << ClassName << "();\n"
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<< " ~" << ClassName << "() override {}\n"
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<< "};\n";
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OS << "} // End llvm namespace \n";
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OS << "} // end llvm namespace \n";
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OS << "#endif // GET_INSTRINFO_HEADER\n\n";
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@ -450,9 +449,8 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
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<< " : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode) {\n"
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<< " InitMCInstrInfo(" << TargetName << "Insts, " << TargetName
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<< "InstrNameIndices, " << TargetName << "InstrNameData, "
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<< NumberedInstructions.size() << ");\n}\n"
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<< ClassName << "::~" << ClassName << "() {}\n";
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OS << "} // End llvm namespace \n";
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<< NumberedInstructions.size() << ");\n}\n";
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OS << "} // end llvm namespace \n";
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OS << "#endif // GET_INSTRINFO_CTOR_DTOR\n\n";
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@ -596,9 +594,9 @@ void InstrInfoEmitter::emitEnums(raw_ostream &OS) {
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OS << " " << Class.Name << "\t= " << Num++ << ",\n";
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OS << " SCHED_LIST_END = " << SchedModels.numInstrSchedClasses() << "\n";
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OS << " };\n";
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OS << "} // End Sched namespace\n";
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OS << "} // End " << Namespace << " namespace\n";
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OS << "} // End llvm namespace \n";
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OS << "} // end Sched namespace\n";
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OS << "} // end " << Namespace << " namespace\n";
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OS << "} // end llvm namespace \n";
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OS << "#endif // GET_INSTRINFO_ENUM\n\n";
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}
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@ -610,4 +608,4 @@ void EmitInstrInfo(RecordKeeper &RK, raw_ostream &OS) {
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EmitMapTable(RK, OS);
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}
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} // End llvm namespace
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} // end llvm namespace
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