Add simple spiller.

llvm-svn: 12188
This commit is contained in:
Alkis Evlogimenos 2004-03-06 22:38:29 +00:00
parent 224e6bdd1d
commit 467364b706
2 changed files with 75 additions and 9 deletions

View File

@ -164,6 +164,9 @@ OPTIONS
Valid spillers are:
<p>
<dl compact>
<dt> simple </dt>
<dd>Simple spiller</dd>
<dt> local </dt>
<dd>Local spiller</dd>
</dl>

View File

@ -36,15 +36,17 @@ namespace {
Statistic<> numStores("spiller", "Number of stores added");
Statistic<> numLoads ("spiller", "Number of loads added");
enum SpillerName { local };
enum SpillerName { simple, local };
cl::opt<SpillerName>
SpillerOpt("spiller",
cl::desc("Spiller to use: (default: local)"),
cl::Prefix,
cl::values(clEnumVal(local, " local spiller"),
cl::values(clEnumVal(simple, " simple spiller"),
clEnumVal(local, " local spiller"),
0),
cl::init(local));
// cl::init(local));
cl::init(simple));
}
int VirtRegMap::assignVirt2StackSlot(unsigned virtReg)
@ -105,6 +107,65 @@ Spiller::~Spiller()
namespace {
class SimpleSpiller : public Spiller {
public:
bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap& vrm) {
DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n");
DEBUG(std::cerr << "********** Function: "
<< mf.getFunction()->getName() << '\n');
const TargetMachine& tm = mf.getTarget();
const MRegisterInfo& mri = *tm.getRegisterInfo();
typedef DenseMap<bool, VirtReg2IndexFunctor> Loaded;
Loaded loaded;
for (MachineFunction::iterator mbbi = mf.begin(),
mbbe = mf.end(); mbbi != mbbe; ++mbbi) {
DEBUG(std::cerr << mbbi->getBasicBlock()->getName() << ":\n");
for (MachineBasicBlock::iterator mii = mbbi->begin(),
mie = mbbi->end(); mii != mie; ++mii) {
loaded.grow(mf.getSSARegMap()->getLastVirtReg());
for (unsigned i = 0,e = mii->getNumOperands(); i != e; ++i){
MachineOperand& mop = mii->getOperand(i);
if (mop.isRegister() && mop.getReg() &&
MRegisterInfo::isVirtualRegister(mop.getReg())) {
unsigned virtReg = mop.getReg();
unsigned physReg = vrm.getPhys(virtReg);
if (mop.isUse() &&
vrm.hasStackSlot(mop.getReg()) &&
!loaded[virtReg]) {
mri.loadRegFromStackSlot(
*mbbi,
mii,
physReg,
vrm.getStackSlot(virtReg),
mf.getSSARegMap()->getRegClass(virtReg));
loaded[virtReg] = true;
DEBUG(std::cerr << '\t';
prior(mii)->print(std::cerr, tm));
++numLoads;
}
if (mop.isDef() &&
vrm.hasStackSlot(mop.getReg())) {
mri.storeRegToStackSlot(
*mbbi,
next(mii),
physReg,
vrm.getStackSlot(virtReg),
mf.getSSARegMap()->getRegClass(virtReg));
++numStores;
}
mii->SetMachineOperandReg(i, physReg);
}
}
DEBUG(std::cerr << '\t'; mii->print(std::cerr, tm));
loaded.clear();
}
}
return true;
}
};
class LocalSpiller : public Spiller {
typedef std::vector<unsigned> Phys2VirtMap;
typedef std::vector<bool> PhysFlag;
@ -157,10 +218,10 @@ namespace {
MachineBasicBlock::iterator lastDef = lastDef_[virtReg];
MachineBasicBlock::iterator nextLastRef = next(lastDef);
mri_->storeRegToStackSlot(*lastDef->getParent(),
nextLastRef,
physReg,
vrm_->getStackSlot(virtReg),
mri_->getRegClass(physReg));
nextLastRef,
physReg,
vrm_->getStackSlot(virtReg),
mri_->getRegClass(physReg));
++numStores;
DEBUG(std::cerr << "added: ";
prior(nextLastRef)->print(std::cerr, *tm_);
@ -191,8 +252,8 @@ namespace {
// load if necessary
if (vrm_->hasStackSlot(virtReg)) {
mri_->loadRegFromStackSlot(mbb, mii, physReg,
vrm_->getStackSlot(virtReg),
mri_->getRegClass(physReg));
vrm_->getStackSlot(virtReg),
mri_->getRegClass(physReg));
++numLoads;
DEBUG(std::cerr << "added: ";
prior(mii)->print(std::cerr, *tm_));
@ -281,5 +342,7 @@ llvm::Spiller* llvm::createSpiller()
abort();
case local:
return new LocalSpiller();
case simple:
return new SimpleSpiller();
}
}