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[WebAssembly] Implement a new algorithm for placing BLOCK markers
Implement a new BLOCK scope placement algorithm which better handles early-return blocks and early exists from nested scopes. Differential Revision: http://reviews.llvm.org/D15368 llvm-svn: 255564
This commit is contained in:
Dan Gohman
parent
bcdb4cbfb8
commit
49cc10581b
@ -29,6 +29,7 @@
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "WebAssemblySubtarget.h"
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#include "llvm/ADT/SCCIterator.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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@ -152,8 +153,23 @@ POStackEntry::POStackEntry(MachineBasicBlock *MBB, MachineFunction &MF,
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});
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}
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/// Return the "bottom" block of a loop. This differs from
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/// MachineLoop::getBottomBlock in that it works even if the loop is
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/// discontiguous.
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static MachineBasicBlock *LoopBottom(const MachineLoop *Loop) {
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MachineBasicBlock *Bottom = Loop->getHeader();
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for (MachineBasicBlock *MBB : Loop->blocks())
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if (MBB->getNumber() > Bottom->getNumber())
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Bottom = MBB;
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return Bottom;
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}
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/// Sort the blocks in RPO, taking special care to make sure that loops are
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/// contiguous even in the case of split backedges.
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///
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/// TODO: Determine whether RPO is actually worthwhile, or whether we should
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/// move to just a stable-topological-sort-based approach that would preserve
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/// more of the original order.
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static void SortBlocks(MachineFunction &MF, const MachineLoopInfo &MLI) {
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// Note that we do our own RPO rather than using
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// "llvm/ADT/PostOrderIterator.h" because we want control over the order that
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@ -198,40 +214,52 @@ static void SortBlocks(MachineFunction &MF, const MachineLoopInfo &MLI) {
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MF.RenumberBlocks();
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#ifndef NDEBUG
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for (auto &MBB : MF)
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if (MachineLoop *Loop = MLI.getLoopFor(&MBB)) {
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// Assert that all containing loops are contiguous.
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for (MachineLoop *L = Loop; L; L = L->getParentLoop()) {
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if (&MBB == L->getHeader()) {
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assert(&MBB == L->getTopBlock());
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} else {
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assert(&MBB != L->getTopBlock());
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assert(L->contains(
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MLI.getLoopFor(&*prev(MachineFunction::iterator(&MBB)))) &&
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"Loop isn't contiguous");
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}
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}
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SmallSetVector<MachineLoop *, 8> OnStack;
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// Insert a sentinel representing the degenerate loop that starts at the
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// function entry block and includes the entire function as a "loop" that
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// executes once.
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OnStack.insert(nullptr);
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for (auto &MBB : MF) {
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assert(MBB.getNumber() >= 0 && "Renumbered blocks should be non-negative.");
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MachineLoop *Loop = MLI.getLoopFor(&MBB);
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if (Loop && &MBB == Loop->getHeader()) {
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// Loop header. The loop predecessor should be sorted above, and the other
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// predecessors should be backedges below.
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for (auto Pred : MBB.predecessors())
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assert(
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(Pred->getNumber() < MBB.getNumber() || Loop->contains(Pred)) &&
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"Loop header predecessors must be loop predecessors or backedges");
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assert(OnStack.insert(Loop) && "Loops should be declared at most once.");
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} else {
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// Assert that non-loops have no backedge predecessors.
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// Not a loop header. All predecessors should be sorted above.
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for (auto Pred : MBB.predecessors())
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assert(Pred->getNumber() < MBB.getNumber() &&
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"CFG still has multiple-entry loops");
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"Non-loop-header predecessors should be topologically sorted");
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assert(OnStack.count(MLI.getLoopFor(&MBB)) &&
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"Blocks must be nested in their loops");
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}
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while (OnStack.size() > 1 && &MBB == LoopBottom(OnStack.back()))
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OnStack.pop_back();
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}
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assert(OnStack.pop_back_val() == nullptr &&
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"The function entry block shouldn't actually be a loop header");
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assert(OnStack.empty() &&
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"Control flow stack pushes and pops should be balanced.");
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#endif
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}
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static unsigned GetLoopDepth(const MachineLoop *Loop) {
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return Loop ? Loop->getLoopDepth() : 0;
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}
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/// Insert a BLOCK marker for branches to MBB (if needed).
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static void PlaceBlockMarkers(MachineBasicBlock &MBB,
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const WebAssemblyInstrInfo &TII,
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MachineDominatorTree &MDT,
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const MachineLoopInfo &MLI) {
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// Place the BLOCK for forward non-fallthrough branches. Put it at the nearest
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// common dominator of all preceding predecesors so that we minimize the time
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// that it's on the stack, which reduces overall stack height.
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static void PlaceBlockMarker(MachineBasicBlock &MBB, MachineFunction &MF,
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SmallVectorImpl<MachineBasicBlock *> &ScopeTops,
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const WebAssemblyInstrInfo &TII,
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const MachineLoopInfo &MLI,
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MachineDominatorTree &MDT) {
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// First compute the nearest common dominator of all forward non-fallthrough
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// predecessors so that we minimize the time that the BLOCK is on the stack,
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// which reduces overall stack height.
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MachineBasicBlock *Header = nullptr;
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bool IsBranchedTo = false;
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int MBBNumber = MBB.getNumber();
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@ -247,67 +275,112 @@ static void PlaceBlockMarkers(MachineBasicBlock &MBB,
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if (!IsBranchedTo)
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return;
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assert(&MBB != &MF.front() && "Header blocks shouldn't have predecessors");
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MachineBasicBlock *LayoutPred = &*prev(MachineFunction::iterator(&MBB));
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// If the nearest common dominator is inside a more deeply nested context,
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// walk out to the nearest scope which isn't more deeply nested.
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for (MachineFunction::iterator I(LayoutPred), E(Header); I != E; --I) {
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if (MachineBasicBlock *ScopeTop = ScopeTops[I->getNumber()]) {
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if (ScopeTop->getNumber() > Header->getNumber()) {
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// Skip over an intervening scope.
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I = next(MachineFunction::iterator(ScopeTop));
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} else {
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// We found a scope level at an appropriate depth.
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Header = ScopeTop;
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break;
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}
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}
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}
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// If there's a loop which ends just before MBB which contains Header, we can
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// reuse its label instead of inserting a new BLOCK.
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for (MachineLoop *Loop = MLI.getLoopFor(LayoutPred);
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Loop && Loop->contains(LayoutPred); Loop = Loop->getParentLoop())
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if (Loop && LoopBottom(Loop) == LayoutPred && Loop->contains(Header))
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return;
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// Decide where in Header to put the BLOCK.
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MachineBasicBlock::iterator InsertPos;
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MachineLoop *HeaderLoop = MLI.getLoopFor(Header);
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unsigned MBBLoopDepth = GetLoopDepth(MLI.getLoopFor(&MBB));
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unsigned HeaderLoopDepth = GetLoopDepth(HeaderLoop);
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if (HeaderLoopDepth > MBBLoopDepth) {
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// The nearest common dominating point is more deeply nested. Insert the
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// BLOCK just above the LOOP.
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for (unsigned i = 0; i < HeaderLoopDepth - 1 - MBBLoopDepth; ++i)
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HeaderLoop = HeaderLoop->getParentLoop();
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Header = HeaderLoop->getHeader();
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if (HeaderLoop && MBB.getNumber() > LoopBottom(HeaderLoop)->getNumber()) {
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// Header is the header of a loop that does not lexically contain MBB, so
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// the BLOCK needs to be above the LOOP.
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InsertPos = Header->begin();
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// Don't insert a BLOCK if we can reuse a loop exit label though.
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if (InsertPos != Header->end() &&
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InsertPos->getOpcode() == WebAssembly::LOOP &&
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InsertPos->getOperand(0).getMBB() == &MBB)
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return;
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} else {
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// Insert the BLOCK as late in the block as we can, but before any existing
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// BLOCKs.
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// Otherwise, insert the BLOCK as late in Header as we can, but before any
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// existing BLOCKs.
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InsertPos = Header->getFirstTerminator();
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while (InsertPos != Header->begin() &&
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std::prev(InsertPos)->getOpcode() == WebAssembly::BLOCK)
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prev(InsertPos)->getOpcode() == WebAssembly::BLOCK)
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--InsertPos;
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}
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// Add the BLOCK.
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BuildMI(*Header, InsertPos, DebugLoc(), TII.get(WebAssembly::BLOCK))
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.addMBB(&MBB);
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// Track the farthest-spanning scope that ends at this point.
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int Number = MBB.getNumber();
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if (!ScopeTops[Number] ||
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ScopeTops[Number]->getNumber() > Header->getNumber())
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ScopeTops[Number] = Header;
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}
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/// Insert a LOOP marker for a loop starting at MBB (if it's a loop header).
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static void PlaceLoopMarker(MachineBasicBlock &MBB, MachineFunction &MF,
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SmallVectorImpl<MachineBasicBlock *> &ScopeTops,
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const WebAssemblyInstrInfo &TII,
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const MachineLoopInfo &MLI) {
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MachineLoop *Loop = MLI.getLoopFor(&MBB);
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if (!Loop || Loop->getHeader() != &MBB)
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return;
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// The operand of a LOOP is the first block after the loop. If the loop is the
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// bottom of the function, insert a dummy block at the end.
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MachineBasicBlock *Bottom = LoopBottom(Loop);
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auto Iter = next(MachineFunction::iterator(Bottom));
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if (Iter == MF.end()) {
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MachineBasicBlock *Label = MF.CreateMachineBasicBlock();
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// Give it a fake predecessor so that AsmPrinter prints its label.
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Label->addSuccessor(Label);
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MF.push_back(Label);
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Iter = next(MachineFunction::iterator(Bottom));
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}
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MachineBasicBlock *AfterLoop = &*Iter;
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BuildMI(MBB, MBB.begin(), DebugLoc(), TII.get(WebAssembly::LOOP))
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.addMBB(AfterLoop);
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// Emit a special no-op telling the asm printer that we need a label to close
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// the loop scope, even though the destination is only reachable by
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// fallthrough.
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if (!Bottom->back().isBarrier())
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BuildMI(*Bottom, Bottom->end(), DebugLoc(), TII.get(WebAssembly::LOOP_END));
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assert((!ScopeTops[AfterLoop->getNumber()] ||
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ScopeTops[AfterLoop->getNumber()]->getNumber() < MBB.getNumber()) &&
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"With RPO we should visit the outer-most loop for a block first.");
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if (!ScopeTops[AfterLoop->getNumber()])
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ScopeTops[AfterLoop->getNumber()] = &MBB;
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}
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/// Insert LOOP and BLOCK markers at appropriate places.
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static void PlaceMarkers(MachineFunction &MF, const MachineLoopInfo &MLI,
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const WebAssemblyInstrInfo &TII,
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MachineDominatorTree &MDT) {
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// For each block whose label represents the end of a scope, record the block
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// which holds the beginning of the scope. This will allow us to quickly skip
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// over scoped regions when walking blocks. We allocate one more than the
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// number of blocks in the function to accommodate for the possible fake block
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// we may insert at the end.
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SmallVector<MachineBasicBlock *, 8> ScopeTops(MF.getNumBlockIDs() + 1);
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for (auto &MBB : MF) {
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// Place the LOOP for MBB if MBB is the header of a loop.
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if (MachineLoop *Loop = MLI.getLoopFor(&MBB))
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if (Loop->getHeader() == &MBB) {
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// The operand of a LOOP is the first block after the loop. If the loop
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// is the bottom of the function, insert a dummy block at the end.
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MachineBasicBlock *Bottom = Loop->getBottomBlock();
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auto Iter = next(MachineFunction::iterator(Bottom));
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if (Iter == MF.end()) {
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MachineBasicBlock *Label = MF.CreateMachineBasicBlock();
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// Give it a fake predecessor so that AsmPrinter prints its label.
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Label->addSuccessor(Label);
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MF.push_back(Label);
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Iter = next(MachineFunction::iterator(Bottom));
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}
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BuildMI(MBB, MBB.begin(), DebugLoc(), TII.get(WebAssembly::LOOP))
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.addMBB(&*Iter);
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// Emit a special no-op telling the asm printer that we need a label
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// to close the loop scope, even though the destination is only
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// reachable by fallthrough.
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if (!Bottom->back().isBarrier())
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BuildMI(*Bottom, Bottom->end(), DebugLoc(),
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TII.get(WebAssembly::LOOP_END));
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}
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PlaceLoopMarker(MBB, MF, ScopeTops, TII, MLI);
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// Place the BLOCK for MBB if MBB is branched to from above.
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PlaceBlockMarkers(MBB, TII, MDT, MLI);
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PlaceBlockMarker(MBB, MF, ScopeTops, TII, MLI, MDT);
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}
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}
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@ -365,8 +438,12 @@ bool WebAssemblyCFGStackify::runOnMachineFunction(MachineFunction &MF) {
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Stack.push_back(std::make_pair(MI.getOperand(0).getMBB(), false));
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break;
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default:
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// Verify that all referenced blocks are in scope. A reference to a
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// block with a negative number is invalid, but can happen with inline
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// asm, so we shouldn't assert on it, but instead let CodeGen properly
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// fail on it.
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for (const MachineOperand &MO : MI.explicit_operands())
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if (MO.isMBB())
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if (MO.isMBB() && MO.getMBB()->getNumber() >= 0)
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assert(IsOnStack(Stack, MO.getMBB()));
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break;
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}
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@ -1,5 +1,5 @@
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; RUN: llc < %s -asm-verbose=false -disable-block-placement | FileCheck %s
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; RUN: llc < %s -asm-verbose=false | FileCheck -check-prefix=OPT %s
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; RUN: llc < %s -asm-verbose=false -disable-block-placement -verify-machineinstrs | FileCheck %s
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; RUN: llc < %s -asm-verbose=false -verify-machineinstrs | FileCheck -check-prefix=OPT %s
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; Test the CFG stackifier pass.
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@ -12,18 +12,20 @@ declare void @something()
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; CHECK-LABEL: test0:
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; CHECK: loop
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; CHECK: i32.add
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; CHECK-NOT: br
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; CHECK: br_if
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; CHECK: i32.add
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; CHECK-NEXT: i32.ge_s
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; CHECK-NEXT: br_if
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; CHECK-NOT: br
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; CHECK: call
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; CHECK: br BB0_1{{$}}
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; CHECK: return{{$}}
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; OPT-LABEL: test0:
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; OPT: loop
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; OPT: i32.add
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; OPT-NOT: br
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; OPT: br_if
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; OPT: i32.add
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; OPT-NEXT: i32.ge_s
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; OPT-NEXT: br_if
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; OPT-NOT: br
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; OPT: call
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; OPT: br BB0_1{{$}}
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@ -51,18 +53,20 @@ back:
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; CHECK-LABEL: test1:
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; CHECK: loop
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; CHECK: i32.add
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; CHECK-NOT: br
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; CHECK: br_if
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; CHECK: i32.add
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; CHECK-NEXT: i32.ge_s
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; CHECK-NEXT: br_if
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; CHECK-NOT: br
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; CHECK: call
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; CHECK: br BB1_1{{$}}
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; CHECK: return{{$}}
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; OPT-LABEL: test1:
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; OPT: loop
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; OPT: i32.add
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; OPT-NOT: br
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; OPT: br_if
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; OPT: i32.add
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; OPT-NEXT: i32.ge_s
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; OPT-NEXT: br_if
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; OPT-NOT: br
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; OPT: call
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; OPT: br BB1_1{{$}}
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@ -416,8 +420,17 @@ exit:
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; Test that nested loops are handled.
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; CHECK-LABEL: test3:
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; CHECK: loop
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; CHECK-NEXT: br_if
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; CHECK-NEXT: BB{{[0-9]+}}_{{[0-9]+}}:
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; CHECK-NEXT: loop
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; OPT-LABEL: test3:
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; OPT: loop
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; OPT-NEXT: br_if
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; OPT-NEXT: BB{{[0-9]+}}_{{[0-9]+}}:
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; OPT-NEXT: loop
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declare void @bar()
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define void @test3(i32 %w) {
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entry:
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br i1 undef, label %outer.ph, label %exit
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@ -443,3 +456,601 @@ if.end:
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call void @bar()
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br label %outer
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}
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; Test switch lowering and block placement.
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; CHECK-LABEL: test4:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK: block BB13_8{{$}}
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; CHECK-NEXT: block BB13_7{{$}}
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; CHECK-NEXT: block BB13_4{{$}}
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; CHECK-NEXT: br_if $pop{{[0-9]*}}, BB13_4{{$}}
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; CHECK-NEXT: block BB13_3{{$}}
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; CHECK: br_if $pop{{[0-9]*}}, BB13_3{{$}}
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; CHECK: br_if $pop{{[0-9]*}}, BB13_7{{$}}
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; CHECK-NEXT: BB13_3:
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; CHECK-NEXT: return{{$}}
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; CHECK-NEXT: BB13_4:
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; CHECK: br_if $pop{{[0-9]*}}, BB13_8{{$}}
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; CHECK: br_if $pop{{[0-9]*}}, BB13_7{{$}}
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; CHECK-NEXT: return{{$}}
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; CHECK-NEXT: BB13_7:
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; CHECK-NEXT: return{{$}}
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; CHECK-NEXT: BB13_8:
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; CHECK-NEXT: return{{$}}
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; OPT-LABEL: test4:
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; OPT-NEXT: .param i32{{$}}
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; OPT: block BB13_8{{$}}
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; OPT-NEXT: block BB13_7{{$}}
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; OPT-NEXT: block BB13_4{{$}}
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; OPT-NEXT: br_if $pop{{[0-9]*}}, BB13_4{{$}}
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; OPT-NEXT: block BB13_3{{$}}
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; OPT: br_if $pop{{[0-9]*}}, BB13_3{{$}}
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; OPT: br_if $pop{{[0-9]*}}, BB13_7{{$}}
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; OPT-NEXT: BB13_3:
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; OPT-NEXT: return{{$}}
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; OPT-NEXT: BB13_4:
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; OPT: br_if $pop{{[0-9]*}}, BB13_8{{$}}
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; OPT: br_if $pop{{[0-9]*}}, BB13_7{{$}}
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; OPT-NEXT: return{{$}}
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; OPT-NEXT: BB13_7:
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; OPT-NEXT: return{{$}}
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; OPT-NEXT: BB13_8:
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; OPT-NEXT: return{{$}}
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define void @test4(i32 %t) {
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entry:
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switch i32 %t, label %default [
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i32 0, label %bb2
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i32 2, label %bb2
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i32 4, label %bb1
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i32 622, label %bb0
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]
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bb0:
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ret void
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bb1:
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ret void
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bb2:
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ret void
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default:
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ret void
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}
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; Test a case where the BLOCK needs to be placed before the LOOP in the
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; same basic block.
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; CHECK-LABEL: test5:
|
||||
; CHECK: BB14_1:
|
||||
; CHECK-NEXT: block BB14_4{{$}}
|
||||
; CHECK-NEXT: loop BB14_3{{$}}
|
||||
; CHECK: br_if {{[^,]*}}, BB14_4{{$}}
|
||||
; CHECK: br_if {{[^,]*}}, BB14_1{{$}}
|
||||
; CHECK-NEXT: BB14_3:
|
||||
; CHECK: return{{$}}
|
||||
; CHECK-NEXT: BB14_4:
|
||||
; CHECK: return{{$}}
|
||||
; OPT-LABEL: test5:
|
||||
; OPT: BB14_1:
|
||||
; OPT-NEXT: block BB14_4{{$}}
|
||||
; OPT-NEXT: loop BB14_3{{$}}
|
||||
; OPT: br_if {{[^,]*}}, BB14_4{{$}}
|
||||
; OPT: br_if {{[^,]*}}, BB14_1{{$}}
|
||||
; OPT-NEXT: BB14_3:
|
||||
; OPT: return{{$}}
|
||||
; OPT-NEXT: BB14_4:
|
||||
; OPT: return{{$}}
|
||||
define void @test5(i1 %p, i1 %q) {
|
||||
entry:
|
||||
br label %header
|
||||
|
||||
header:
|
||||
store volatile i32 0, i32* null
|
||||
br i1 %p, label %more, label %alt
|
||||
|
||||
more:
|
||||
store volatile i32 1, i32* null
|
||||
br i1 %q, label %header, label %return
|
||||
|
||||
alt:
|
||||
store volatile i32 2, i32* null
|
||||
ret void
|
||||
|
||||
return:
|
||||
store volatile i32 3, i32* null
|
||||
ret void
|
||||
}
|
||||
|
||||
; Test an interesting case of a loop with multiple exits, which
|
||||
; aren't to layout successors of the loop, and one of which is to a successors
|
||||
; which has another predecessor.
|
||||
|
||||
; CHECK-LABEL: test6:
|
||||
; CHECK: BB15_1:
|
||||
; CHECK-NEXT: block BB15_6{{$}}
|
||||
; CHECK-NEXT: block BB15_5{{$}}
|
||||
; CHECK-NEXT: loop BB15_4{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB15_6{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB15_5{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB15_1{{$}}
|
||||
; CHECK-NEXT: BB15_4:
|
||||
; CHECK-NOT: block
|
||||
; CHECK: return{{$}}
|
||||
; CHECK-NEXT: BB15_5:
|
||||
; CHECK-NOT: block
|
||||
; CHECK: BB15_6:
|
||||
; CHECK-NOT: block
|
||||
; CHECK: return{{$}}
|
||||
; OPT-LABEL: test6:
|
||||
; OPT: BB15_1:
|
||||
; OPT-NEXT: block BB15_6{{$}}
|
||||
; OPT-NEXT: block BB15_5{{$}}
|
||||
; OPT-NEXT: loop BB15_4{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB15_6{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB15_5{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB15_1{{$}}
|
||||
; OPT-NEXT: BB15_4:
|
||||
; OPT-NOT: block
|
||||
; OPT: return{{$}}
|
||||
; OPT-NEXT: BB15_5:
|
||||
; OPT-NOT: block
|
||||
; OPT: BB15_6:
|
||||
; OPT-NOT: block
|
||||
; OPT: return{{$}}
|
||||
define void @test6(i1 %p, i1 %q) {
|
||||
entry:
|
||||
br label %header
|
||||
|
||||
header:
|
||||
store volatile i32 0, i32* null
|
||||
br i1 %p, label %more, label %second
|
||||
|
||||
more:
|
||||
store volatile i32 1, i32* null
|
||||
br i1 %q, label %evenmore, label %first
|
||||
|
||||
evenmore:
|
||||
store volatile i32 1, i32* null
|
||||
br i1 %q, label %header, label %return
|
||||
|
||||
return:
|
||||
store volatile i32 2, i32* null
|
||||
ret void
|
||||
|
||||
first:
|
||||
store volatile i32 3, i32* null
|
||||
br label %second
|
||||
|
||||
second:
|
||||
store volatile i32 4, i32* null
|
||||
ret void
|
||||
}
|
||||
|
||||
; Test a case where there are multiple backedges and multiple loop exits
|
||||
; that end in unreachable.
|
||||
|
||||
; CHECK-LABEL: test7:
|
||||
; CHECK: BB16_1:
|
||||
; CHECK-NEXT: loop BB16_5{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: block BB16_4{{$}}
|
||||
; CHECK-NEXT: br_if {{[^,]*}}, BB16_4{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB16_1{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: unreachable
|
||||
; CHECK_NEXT: BB16_4:
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB16_1{{$}}
|
||||
; CHECK-NEXT: BB16_5:
|
||||
; CHECK-NOT: block
|
||||
; CHECK: unreachable
|
||||
; OPT-LABEL: test7:
|
||||
; OPT: BB16_1:
|
||||
; OPT-NEXT: loop BB16_5{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: block BB16_4{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB16_4{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB16_1{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: unreachable
|
||||
; OPT_NEXT: BB16_4:
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB16_1{{$}}
|
||||
; OPT-NEXT: BB16_5:
|
||||
; OPT-NOT: block
|
||||
; OPT: unreachable
|
||||
define void @test7(i1 %tobool2, i1 %tobool9) {
|
||||
entry:
|
||||
store volatile i32 0, i32* null
|
||||
br label %loop
|
||||
|
||||
loop:
|
||||
store volatile i32 1, i32* null
|
||||
br i1 %tobool2, label %l1, label %l0
|
||||
|
||||
l0:
|
||||
store volatile i32 2, i32* null
|
||||
br i1 %tobool9, label %loop, label %u0
|
||||
|
||||
l1:
|
||||
store volatile i32 3, i32* null
|
||||
br i1 %tobool9, label %loop, label %u1
|
||||
|
||||
u0:
|
||||
store volatile i32 4, i32* null
|
||||
unreachable
|
||||
|
||||
u1:
|
||||
store volatile i32 5, i32* null
|
||||
unreachable
|
||||
}
|
||||
|
||||
; Test an interesting case using nested loops and switches.
|
||||
|
||||
; CHECK-LABEL: test8:
|
||||
; CHECK: BB17_1:
|
||||
; CHECK-NEXT: loop BB17_4{{$}}
|
||||
; CHECK-NEXT: block BB17_3{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB17_3{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB17_1{{$}}
|
||||
; CHECK-NEXT: BB17_3:
|
||||
; CHECK-NEXT: loop BB17_4{{$}}
|
||||
; CHECK-NEXT: br_if {{[^,]*}}, BB17_3{{$}}
|
||||
; CHECK-NEXT: br BB17_1{{$}}
|
||||
; CHECK-NEXT: BB17_4:
|
||||
; OPT-LABEL: test8:
|
||||
; OPT: BB17_1:
|
||||
; OPT-NEXT: loop BB17_4{{$}}
|
||||
; OPT-NEXT: block BB17_3{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB17_3{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB17_1{{$}}
|
||||
; OPT-NEXT: BB17_3:
|
||||
; OPT-NEXT: loop BB17_4{{$}}
|
||||
; OPT-NEXT: br_if {{[^,]*}}, BB17_3{{$}}
|
||||
; OPT-NEXT: br BB17_1{{$}}
|
||||
; OPT-NEXT: BB17_4:
|
||||
define i32 @test8() {
|
||||
bb:
|
||||
br label %bb1
|
||||
|
||||
bb1:
|
||||
br i1 undef, label %bb2, label %bb3
|
||||
|
||||
bb2:
|
||||
switch i8 undef, label %bb1 [
|
||||
i8 44, label %bb2
|
||||
]
|
||||
|
||||
bb3:
|
||||
switch i8 undef, label %bb1 [
|
||||
i8 44, label %bb2
|
||||
]
|
||||
}
|
||||
|
||||
; Test an interesting case using nested loops that share a bottom block.
|
||||
|
||||
; CHECK-LABEL: test9:
|
||||
; CHECK: BB18_1:
|
||||
; CHECK-NEXT: loop BB18_5{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB18_5{{$}}
|
||||
; CHECK-NEXT: BB18_2:
|
||||
; CHECK-NEXT: loop BB18_5{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: block BB18_4{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB18_4{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB18_2{{$}}
|
||||
; CHECK-NEXT: br BB18_1{{$}}
|
||||
; CHECK-NEXT: BB18_4:
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB18_2{{$}}
|
||||
; CHECK-NEXT: br BB18_1{{$}}
|
||||
; CHECK-NEXT: BB18_5:
|
||||
; CHECK-NOT: block
|
||||
; CHECK: return{{$}}
|
||||
; OPT-LABEL: test9:
|
||||
; OPT: BB18_1:
|
||||
; OPT-NEXT: loop BB18_5{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB18_5{{$}}
|
||||
; OPT-NEXT: BB18_2:
|
||||
; OPT-NEXT: loop BB18_5{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: block BB18_4{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB18_4{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB18_2{{$}}
|
||||
; OPT-NEXT: br BB18_1{{$}}
|
||||
; OPT-NEXT: BB18_4:
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB18_2{{$}}
|
||||
; OPT-NEXT: br BB18_1{{$}}
|
||||
; OPT-NEXT: BB18_5:
|
||||
; OPT-NOT: block
|
||||
; OPT: return{{$}}
|
||||
declare i1 @a()
|
||||
define void @test9() {
|
||||
entry:
|
||||
store volatile i32 0, i32* null
|
||||
br label %header
|
||||
|
||||
header:
|
||||
store volatile i32 1, i32* null
|
||||
%call4 = call i1 @a()
|
||||
br i1 %call4, label %header2, label %end
|
||||
|
||||
header2:
|
||||
store volatile i32 2, i32* null
|
||||
%call = call i1 @a()
|
||||
br i1 %call, label %if.then, label %if.else
|
||||
|
||||
if.then:
|
||||
store volatile i32 3, i32* null
|
||||
%call3 = call i1 @a()
|
||||
br i1 %call3, label %header2, label %header
|
||||
|
||||
if.else:
|
||||
store volatile i32 4, i32* null
|
||||
%call2 = call i1 @a()
|
||||
br i1 %call2, label %header2, label %header
|
||||
|
||||
end:
|
||||
store volatile i32 5, i32* null
|
||||
ret void
|
||||
}
|
||||
|
||||
; Test an interesting case involving nested loops sharing a loop bottom,
|
||||
; and loop exits to a block with unreachable.
|
||||
|
||||
; CHECK-LABEL: test10:
|
||||
; CHECK: BB19_1:
|
||||
; CHECK-NEXT: loop BB19_7{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB19_1{{$}}
|
||||
; CHECK-NEXT: BB19_2:
|
||||
; CHECK-NEXT: block BB19_6{{$}}
|
||||
; CHECK-NEXT: loop BB19_5{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: BB19_3:
|
||||
; CHECK-NEXT: loop BB19_5{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB19_1{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: tableswitch {{[^,]*}}, BB19_3, BB19_3, BB19_5, BB19_1, BB19_2, BB19_6{{$}}
|
||||
; CHECK-NEXT: BB19_5:
|
||||
; CHECK-NEXT: return{{$}}
|
||||
; CHECK-NEXT: BB19_6:
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br BB19_1{{$}}
|
||||
; CHECK-NEXT: BB19_7:
|
||||
; OPT-LABEL: test10:
|
||||
; OPT: BB19_1:
|
||||
; OPT-NEXT: loop BB19_7{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB19_1{{$}}
|
||||
; OPT-NEXT: BB19_2:
|
||||
; OPT-NEXT: block BB19_6{{$}}
|
||||
; OPT-NEXT: loop BB19_5{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: BB19_3:
|
||||
; OPT-NEXT: loop BB19_5{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB19_1{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: tableswitch {{[^,]*}}, BB19_3, BB19_3, BB19_5, BB19_1, BB19_2, BB19_6{{$}}
|
||||
; OPT-NEXT: BB19_5:
|
||||
; OPT-NEXT: return{{$}}
|
||||
; OPT-NEXT: BB19_6:
|
||||
; OPT-NOT: block
|
||||
; OPT: br BB19_1{{$}}
|
||||
; OPT-NEXT: BB19_7:
|
||||
define void @test10() {
|
||||
bb0:
|
||||
br label %bb1
|
||||
|
||||
bb1:
|
||||
%tmp = phi i32 [ 2, %bb0 ], [ 3, %bb3 ]
|
||||
%tmp3 = phi i32 [ undef, %bb0 ], [ %tmp11, %bb3 ]
|
||||
%tmp4 = icmp eq i32 %tmp3, 0
|
||||
br i1 %tmp4, label %bb4, label %bb2
|
||||
|
||||
bb2:
|
||||
br label %bb3
|
||||
|
||||
bb3:
|
||||
%tmp11 = phi i32 [ 1, %bb5 ], [ 0, %bb2 ]
|
||||
br label %bb1
|
||||
|
||||
bb4:
|
||||
%tmp6 = phi i32 [ %tmp9, %bb5 ], [ 4, %bb1 ]
|
||||
%tmp7 = phi i32 [ %tmp6, %bb5 ], [ %tmp, %bb1 ]
|
||||
br label %bb5
|
||||
|
||||
bb5:
|
||||
%tmp9 = phi i32 [ %tmp6, %bb5 ], [ %tmp7, %bb4 ]
|
||||
switch i32 %tmp9, label %bb2 [
|
||||
i32 0, label %bb5
|
||||
i32 1, label %bb6
|
||||
i32 3, label %bb4
|
||||
i32 4, label %bb3
|
||||
]
|
||||
|
||||
bb6:
|
||||
ret void
|
||||
}
|
||||
|
||||
; Test a CFG DAG with interesting merging.
|
||||
|
||||
; CHECK-LABEL: test11:
|
||||
; CHECK: block BB20_8{{$}}
|
||||
; CHECK-NEXT: block BB20_7{{$}}
|
||||
; CHECK-NEXT: block BB20_6{{$}}
|
||||
; CHECK-NEXT: block BB20_4{{$}}
|
||||
; CHECK-NEXT: br_if {{[^,]*}}, BB20_4{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: block BB20_3{{$}}
|
||||
; CHECK-NEXT: br_if {{[^,]*}}, BB20_3{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB20_6{{$}}
|
||||
; CHECK-NEXT: BB20_3:
|
||||
; CHECK-NOT: block
|
||||
; CHECK: return{{$}}
|
||||
; CHECK-NEXT: BB20_4:
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB20_8{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB20_7{{$}}
|
||||
; CHECK-NEXT: BB20_6:
|
||||
; CHECK-NOT: block
|
||||
; CHECK: return{{$}}
|
||||
; CHECK-NEXT: BB20_7:
|
||||
; CHECK-NOT: block
|
||||
; CHECK: return{{$}}
|
||||
; CHECK-NEXT: BB20_8:
|
||||
; CHECK-NOT: block
|
||||
; CHECK: return{{$}}
|
||||
; OPT-LABEL: test11:
|
||||
; OPT: block BB20_8{{$}}
|
||||
; OPT-NEXT: block BB20_4{{$}}
|
||||
; OPT-NEXT: br_if $0, BB20_4{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: block BB20_3{{$}}
|
||||
; OPT-NEXT: br_if $0, BB20_3{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if $0, BB20_8{{$}}
|
||||
; OPT-NEXT: BB20_3:
|
||||
; OPT-NOT: block
|
||||
; OPT: return{{$}}
|
||||
; OPT-NEXT: BB20_4:
|
||||
; OPT-NOT: block
|
||||
; OPT: block BB20_6{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if $pop9, BB20_6{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: return{{$}}
|
||||
; OPT-NEXT: BB20_6:
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if $0, BB20_8{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: return{{$}}
|
||||
; OPT-NEXT: BB20_8:
|
||||
; OPT-NOT: block
|
||||
; OPT: return{{$}}
|
||||
define void @test11() {
|
||||
bb0:
|
||||
store volatile i32 0, i32* null
|
||||
br i1 undef, label %bb1, label %bb4
|
||||
bb1:
|
||||
store volatile i32 1, i32* null
|
||||
br i1 undef, label %bb3, label %bb2
|
||||
bb2:
|
||||
store volatile i32 2, i32* null
|
||||
br i1 undef, label %bb3, label %bb7
|
||||
bb3:
|
||||
store volatile i32 3, i32* null
|
||||
ret void
|
||||
bb4:
|
||||
store volatile i32 4, i32* null
|
||||
br i1 undef, label %bb8, label %bb5
|
||||
bb5:
|
||||
store volatile i32 5, i32* null
|
||||
br i1 undef, label %bb6, label %bb7
|
||||
bb6:
|
||||
store volatile i32 6, i32* null
|
||||
ret void
|
||||
bb7:
|
||||
store volatile i32 7, i32* null
|
||||
ret void
|
||||
bb8:
|
||||
store volatile i32 8, i32* null
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: test12:
|
||||
; CHECK: BB21_1:
|
||||
; CHECK-NEXT: loop BB21_8{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: block BB21_7{{$}}
|
||||
; CHECK-NEXT: block BB21_6{{$}}
|
||||
; CHECK-NEXT: block BB21_4{{$}}
|
||||
; CHECK-NEXT: br_if {{[^,]*}}, BB21_4{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB21_7{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB21_7{{$}}
|
||||
; CHECK-NEXT: br BB21_6{{$}}
|
||||
; CHECK-NEXT: BB21_4:
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB21_7{{$}}
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br_if {{[^,]*}}, BB21_7{{$}}
|
||||
; CHECK-NEXT: BB21_6:
|
||||
; CHECK-NEXT: return{{$}}
|
||||
; CHECK-NEXT: BB21_7:
|
||||
; CHECK-NOT: block
|
||||
; CHECK: br BB21_1{{$}}
|
||||
; CHECK-NEXT: BB21_8:
|
||||
; OPT-LABEL: test12:
|
||||
; OPT: BB21_1:
|
||||
; OPT-NEXT: loop BB21_8{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: block BB21_7{{$}}
|
||||
; OPT-NEXT: block BB21_6{{$}}
|
||||
; OPT-NEXT: block BB21_4{{$}}
|
||||
; OPT-NEXT: br_if {{[^,]*}}, BB21_4{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB21_7{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB21_7{{$}}
|
||||
; OPT-NEXT: br BB21_6{{$}}
|
||||
; OPT-NEXT: BB21_4:
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB21_7{{$}}
|
||||
; OPT-NOT: block
|
||||
; OPT: br_if {{[^,]*}}, BB21_7{{$}}
|
||||
; OPT-NEXT: BB21_6:
|
||||
; OPT-NEXT: return{{$}}
|
||||
; OPT-NEXT: BB21_7:
|
||||
; OPT-NOT: block
|
||||
; OPT: br BB21_1{{$}}
|
||||
; OPT-NEXT: BB21_8:
|
||||
define void @test12(i8* %arg) {
|
||||
bb:
|
||||
br label %bb1
|
||||
|
||||
bb1:
|
||||
%tmp = phi i32 [ 0, %bb ], [ %tmp5, %bb4 ]
|
||||
%tmp2 = getelementptr i8, i8* %arg, i32 %tmp
|
||||
%tmp3 = load i8, i8* %tmp2
|
||||
switch i8 %tmp3, label %bb7 [
|
||||
i8 42, label %bb4
|
||||
i8 76, label %bb4
|
||||
i8 108, label %bb4
|
||||
i8 104, label %bb4
|
||||
]
|
||||
|
||||
bb4:
|
||||
%tmp5 = add i32 %tmp, 1
|
||||
br label %bb1
|
||||
|
||||
bb7:
|
||||
ret void
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user