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[Power9] Allow AnyExt immediates for XXSPLTIB

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In some situations, the BUILD_VECTOR node that builds a v18i8 vector by
a splat of an i8 constant will end up with signed 8-bit values and other
situations, it'll end up with unsigned ones. Handle both situations.

Fixes PR31340.

llvm-svn: 289804
This commit is contained in:
Nemanja Ivanovic 2016-12-15 11:16:20 +00:00
parent dbe4adba91
commit 4a98a366d8
3 changed files with 16 additions and 7 deletions
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2
lib/Target/PowerPC/PPCInstrInfo.td
View File

@ -326,7 +326,7 @@ def immZExt16 : PatLeaf<(imm), [{
// field. Used by instructions like 'ori'.
return (uint64_t)N->getZExtValue() == (unsigned short)N->getZExtValue();
}], LO16>;
def immSExt8 : ImmLeaf<i32, [{ return isInt<8>(Imm); }]>;
def immAnyExt8 : ImmLeaf<i32, [{ return isInt<8>(Imm) || isUInt<8>(Imm); }]>;
def immSExt5NonZero : ImmLeaf<i32, [{ return Imm && isInt<5>(Imm); }]>;
// imm16Shifted* - These match immediates where the low 16-bits are zero. There

12
lib/Target/PowerPC/PPCInstrVSX.td
View File

@ -2865,12 +2865,12 @@ let AddedComplexity = 400 in {
(v4i32 (MTVSRWS $A))>;
def : Pat<(v4i32 (build_vector i32:$A, i32:$A, i32:$A, i32:$A)),
(v4i32 (MTVSRWS $A))>;
def : Pat<(v16i8 (build_vector immSExt8:$A, immSExt8:$A, immSExt8:$A,
immSExt8:$A, immSExt8:$A, immSExt8:$A,
immSExt8:$A, immSExt8:$A, immSExt8:$A,
immSExt8:$A, immSExt8:$A, immSExt8:$A,
immSExt8:$A, immSExt8:$A, immSExt8:$A,
immSExt8:$A)),
def : Pat<(v16i8 (build_vector immAnyExt8:$A, immAnyExt8:$A, immAnyExt8:$A,
immAnyExt8:$A, immAnyExt8:$A, immAnyExt8:$A,
immAnyExt8:$A, immAnyExt8:$A, immAnyExt8:$A,
immAnyExt8:$A, immAnyExt8:$A, immAnyExt8:$A,
immAnyExt8:$A, immAnyExt8:$A, immAnyExt8:$A,
immAnyExt8:$A)),
(v16i8 (COPY_TO_REGCLASS (XXSPLTIB imm:$A), VSRC))>;
def : Pat<(v16i8 immAllOnesV),
(v16i8 (COPY_TO_REGCLASS (XXSPLTIB 255), VSRC))>;

9
test/CodeGen/PowerPC/power9-moves-and-splats.ll
View File

@ -152,6 +152,15 @@ entry:
ret <16 x i8> <i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127>
}
define <16 x i8> @test13E127() {
entry:
; CHECK-LABEL: test13E127
; CHECK: xxspltib 34, 200
; CHECK-BE-LABEL: test13E127
; CHECK-BE: xxspltib 34, 200
ret <16 x i8> <i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200>
}
define <4 x i32> @test14(<4 x i32> %a, i32* nocapture readonly %b) {
entry:
; CHECK-LABEL: test14