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[AArch64] Reject inline asm with FP registers when FP is disabled.

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Otherwise, we would crash trying to deal with an illegal input.

Differential Revision: https://reviews.llvm.org/D51202

llvm-svn: 340637
This commit is contained in:
Eli Friedman 2018-08-24 19:12:13 +00:00
parent 084c5476f3
commit 4bc71970fe
2 changed files with 26 additions and 0 deletions
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9
lib/Target/AArch64/AArch64ISelLowering.cpp
View File

@ -5443,6 +5443,8 @@ AArch64TargetLowering::getRegForInlineAsmConstraint(
return std::make_pair(0U, &AArch64::GPR64commonRegClass);
return std::make_pair(0U, &AArch64::GPR32commonRegClass);
case 'w':
if (!Subtarget->hasFPARMv8())
break;
if (VT.getSizeInBits() == 16)
return std::make_pair(0U, &AArch64::FPR16RegClass);
if (VT.getSizeInBits() == 32)
@ -5455,6 +5457,8 @@ AArch64TargetLowering::getRegForInlineAsmConstraint(
// The instructions that this constraint is designed for can
// only take 128-bit registers so just use that regclass.
case 'x':
if (!Subtarget->hasFPARMv8())
break;
if (VT.getSizeInBits() == 128)
return std::make_pair(0U, &AArch64::FPR128_loRegClass);
break;
@ -5490,6 +5494,11 @@ AArch64TargetLowering::getRegForInlineAsmConstraint(
}
}
if (Res.second && !Subtarget->hasFPARMv8() &&
!AArch64::GPR32allRegClass.hasSubClassEq(Res.second) &&
!AArch64::GPR64allRegClass.hasSubClassEq(Res.second))
return std::make_pair(0U, nullptr);
return Res;
}

17
test/CodeGen/AArch64/inlineasm-illegal-type.ll Normal file
View File

@ -0,0 +1,17 @@
;RUN: not llc -mtriple=aarch64-linux-gnu -mattr=-fp-armv8 < %s 2>&1 | FileCheck %s
; CHECK: error: couldn't allocate output register for constraint '{d0}'
; CHECK: error: couldn't allocate output register for constraint 'w'
define hidden double @test1(double %xx) local_unnamed_addr #0 {
entry:
%0 = tail call double asm "frintp ${0:d}, ${0:d}", "={d0}"()
ret double %0
}
define hidden double @test2(double %xx) local_unnamed_addr #0 {
entry:
%0 = tail call double asm "frintp ${0:d}, ${0:d}", "=w"()
ret double %0
}