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[MIRTesting] Abort when failing to parse a function.

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When we failed to parse a function in the mir parser, we should abort
the whole compilation instead of continuing in a weird state. Indeed,
this was creating strange machine function passes failures that were
hard to understand, until we notice that the function actually did not
get parsed correctly!

llvm-svn: 276348
This commit is contained in:
Quentin Colombet 2016-07-21 22:25:57 +00:00
parent f2a130f0d1
commit 5117f51865
5 changed files with 46 additions and 37 deletions
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6
lib/CodeGen/MachineFunctionAnalysis.cpp
View File

@ -49,8 +49,10 @@ bool MachineFunctionAnalysis::runOnFunction(Function &F) {
assert(!MF && "MachineFunctionAnalysis already initialized!");
MF = new MachineFunction(&F, TM, NextFnNum++,
getAnalysis<MachineModuleInfo>());
if (MFInitializer)
MFInitializer->initializeMachineFunction(*MF);
if (MFInitializer) {
if (MFInitializer->initializeMachineFunction(*MF))
report_fatal_error("Unable to initialize machine function");
}
return false;
}

26
test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir
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@ -1,37 +1,16 @@
# RUN: not llc -mtriple=aarch64-apple-ios -run-pass none -o - %s 2> %t.log \
# RUN: | FileCheck %s --check-prefix=CHECK
# RUN: FileCheck %s -input-file=%t.log --check-prefix=ERR
# RUN: rm -f %t.log
# RUN: not llc -mtriple=aarch64-apple-ios -run-pass none -o - %s 2>&1 \
# RUN: | FileCheck %s --check-prefix=ERR
# REQUIRES: global-isel
# This test ensures that the MIR parser errors out when
# generic virtual register definitions are not correct.
--- |
define void @bar() { ret void }
define void @baz() { ret void }
...
---
name: bar
isSSA: true
# CHECK: registers:
# CHECK-NEXT: - { id: 0, class: gpr }
registers:
- { id: 0, class: gpr }
body: |
bb.0:
liveins: %w0
; ERR: generic virtual registers must have a size
; ERR-NEXT: %0
%0 = G_ADD i32 %w0, %w0
...
---
name: baz
isSSA: true
# CHECK: registers:
# CHECK-NEXT: - { id: 0, class: _ }
registers:
- { id: 0, class: _ }
body: |
@ -39,5 +18,6 @@ body: |
liveins: %w0
; ERR: generic virtual registers must have a size
; ERR-NEXT: %0
; ERR: Unable to initialize machine function
%0 = G_ADD i32 %w0, %w0
...

24
test/CodeGen/MIR/AArch64/generic-virtual-registers-with-regbank-error.mir Normal file
View File

@ -0,0 +1,24 @@
# RUN: not llc -mtriple=aarch64-apple-ios -run-pass none -o - %s 2>&1 \
# RUN: | FileCheck %s --check-prefix=ERR
# REQUIRES: global-isel
# This test ensures that the MIR parser errors out when
# generic virtual register definitions are not correct.
# In that case, it is defined by a register bank.
--- |
define void @bar() { ret void }
...
---
name: bar
isSSA: true
registers:
- { id: 0, class: gpr }
body: |
bb.0:
liveins: %w0
; ERR: generic virtual registers must have a size
; ERR-NEXT: %0
; ERR: Unable to initialize machine function
%0 = G_ADD i32 %w0, %w0
...

14
test/CodeGen/MIR/X86/unexpected-size-non-generic-register-phys.mir Normal file
View File

@ -0,0 +1,14 @@
# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that an error is reported when a register operand is sized
# but isn't generic, like a physical register.
---
name: test_size_physreg
isSSA: true
registers:
body: |
bb.0.entry:
liveins: %edi
; CHECK: [[@LINE+1]]:10: unexpected size on physical register
%edi(32) = G_ADD i32 %edi, %edi
...

13
test/CodeGen/MIR/X86/unexpected-size-non-generic-register.mir
View File

@ -1,6 +1,6 @@
# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that an error is reported when a register operand is sized
# but isn't generic.
# but isn't generic like a regular virtual register (gr32).
---
name: test_size_regclass
@ -13,14 +13,3 @@ body: |
; CHECK: [[@LINE+1]]:8: unexpected size on non-generic virtual register
%0(32) = G_ADD i32 %edi, %edi
...
---
name: test_size_physreg
isSSA: true
registers:
body: |
bb.0.entry:
liveins: %edi
; CHECK: [[@LINE+1]]:10: unexpected size on physical register
%edi(32) = G_ADD i32 %edi, %edi
...