mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-12-22 19:49:49 +00:00
I think that V8 should coallesce registers, don't you?
llvm-svn: 15192
This commit is contained in:
parent
d4ef731684
commit
5196d002f9
@ -12,6 +12,7 @@
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#include "SparcV8InstrInfo.h"
|
||||
#include "SparcV8.h"
|
||||
#include "llvm/CodeGen/MachineInstrBuilder.h"
|
||||
#include "SparcV8GenInstrInfo.inc"
|
||||
using namespace llvm;
|
||||
@ -20,3 +21,21 @@ SparcV8InstrInfo::SparcV8InstrInfo()
|
||||
: TargetInstrInfo(SparcV8Insts, sizeof(SparcV8Insts)/sizeof(SparcV8Insts[0])){
|
||||
}
|
||||
|
||||
/// Return true if the instruction is a register to register move and
|
||||
/// leave the source and dest operands in the passed parameters.
|
||||
///
|
||||
bool SparcV8InstrInfo::isMoveInstr(const MachineInstr &MI,
|
||||
unsigned &SrcReg, unsigned &DstReg) const {
|
||||
if (MI.getOpcode() == V8::ORrr) {
|
||||
if (MI.getOperand(1).getReg() == V8::G0) { // X = or G0, Y -> X = Y
|
||||
DstReg = MI.getOperand(0).getReg();
|
||||
SrcReg = MI.getOperand(2).getReg();
|
||||
}
|
||||
return true;
|
||||
} else if (MI.getOpcode() == V8::FMOVS) {
|
||||
SrcReg = MI.getOperand(1).getReg();
|
||||
DstReg = MI.getOperand(0).getReg();
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
@ -41,6 +41,12 @@ public:
|
||||
/// always be able to get register info as well (through this method).
|
||||
///
|
||||
virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
|
||||
|
||||
/// Return true if the instruction is a register to register move and
|
||||
/// leave the source and dest operands in the passed parameters.
|
||||
///
|
||||
virtual bool isMoveInstr(const MachineInstr &MI,
|
||||
unsigned &SrcReg, unsigned &DstReg) const;
|
||||
};
|
||||
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user