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Allow up to 64 functional units per processor itinerary.
This patch changes the type used to hold the FU bitset from unsigned to uint64_t. This will be needed for some upcoming PowerPC itineraries. llvm-svn: 158679
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@ -42,7 +42,7 @@ class SUnit;
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class DFAPacketizer {
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private:
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typedef std::pair<unsigned, unsigned> UnsignPair;
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typedef std::pair<unsigned, uint64_t> UnsignPair;
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const InstrItineraryData *InstrItins;
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int CurrentState;
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const int (*DFAStateInputTable)[2];
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@ -39,7 +39,7 @@ class ScoreboardHazardRecognizer : public ScheduleHazardRecognizer {
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// bottom-up scheduler, then the scoreboard cycles are the inverse of the
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// scheduler's cycles.
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class Scoreboard {
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unsigned *Data;
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uint64_t *Data;
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// The maximum number of cycles monitored by the Scoreboard. This
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// value is determined based on the target itineraries to ensure
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@ -54,7 +54,7 @@ class ScoreboardHazardRecognizer : public ScheduleHazardRecognizer {
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}
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size_t getDepth() const { return Depth; }
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unsigned& operator[](size_t idx) const {
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uint64_t& operator[](size_t idx) const {
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// Depth is expected to be a power-of-2.
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assert(Depth && !(Depth & (Depth - 1)) &&
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"Scoreboard was not initialized properly!");
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@ -65,7 +65,7 @@ class ScoreboardHazardRecognizer : public ScheduleHazardRecognizer {
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void reset(size_t d = 1) {
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if (Data == NULL) {
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Depth = d;
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Data = new unsigned[Depth];
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Data = new uint64_t[Depth];
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}
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memset(Data, 0, Depth * sizeof(Data[0]));
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@ -62,7 +62,7 @@ struct InstrStage {
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};
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unsigned Cycles_; ///< Length of stage in machine cycles
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unsigned Units_; ///< Choice of functional units
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uint64_t Units_; ///< Choice of functional units
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int NextCycles_; ///< Number of machine cycles to next stage
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ReservationKinds Kind_; ///< Kind of the FU reservation
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@ -72,7 +72,7 @@ struct InstrStage {
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}
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/// getUnits - returns the choice of FUs
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unsigned getUnits() const {
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uint64_t getUnits() const {
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return Units_;
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}
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@ -66,7 +66,7 @@ void DFAPacketizer::ReadTable(unsigned int state) {
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bool DFAPacketizer::canReserveResources(const llvm::MCInstrDesc *MID) {
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unsigned InsnClass = MID->getSchedClass();
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const llvm::InstrStage *IS = InstrItins->beginStage(InsnClass);
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unsigned FuncUnits = IS->getUnits();
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uint64_t FuncUnits = IS->getUnits();
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UnsignPair StateTrans = UnsignPair(CurrentState, FuncUnits);
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ReadTable(CurrentState);
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return (CachedTable.count(StateTrans) != 0);
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@ -78,7 +78,7 @@ bool DFAPacketizer::canReserveResources(const llvm::MCInstrDesc *MID) {
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void DFAPacketizer::reserveResources(const llvm::MCInstrDesc *MID) {
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unsigned InsnClass = MID->getSchedClass();
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const llvm::InstrStage *IS = InstrItins->beginStage(InsnClass);
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unsigned FuncUnits = IS->getUnits();
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uint64_t FuncUnits = IS->getUnits();
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UnsignPair StateTrans = UnsignPair(CurrentState, FuncUnits);
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ReadTable(CurrentState);
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assert(CachedTable.count(StateTrans) != 0);
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@ -95,9 +95,9 @@ void ScoreboardHazardRecognizer::Scoreboard::dump() const {
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last--;
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for (unsigned i = 0; i <= last; i++) {
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unsigned FUs = (*this)[i];
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uint64_t FUs = (*this)[i];
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dbgs() << "\t";
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for (int j = 31; j >= 0; j--)
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for (int j = 63; j >= 0; j--)
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dbgs() << ((FUs & (1 << j)) ? '1' : '0');
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dbgs() << '\n';
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}
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@ -144,7 +144,7 @@ ScoreboardHazardRecognizer::getHazardType(SUnit *SU, int Stalls) {
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break;
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}
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unsigned freeUnits = IS->getUnits();
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uint64_t freeUnits = IS->getUnits();
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switch (IS->getReservationKind()) {
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case InstrStage::Required:
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// Required FUs conflict with both reserved and required ones
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@ -196,7 +196,7 @@ void ScoreboardHazardRecognizer::EmitInstruction(SUnit *SU) {
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assert(((cycle + i) < RequiredScoreboard.getDepth()) &&
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"Scoreboard depth exceeded!");
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unsigned freeUnits = IS->getUnits();
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uint64_t freeUnits = IS->getUnits();
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switch (IS->getReservationKind()) {
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case InstrStage::Required:
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// Required FUs conflict with both reserved and required ones
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@ -209,7 +209,7 @@ void ScoreboardHazardRecognizer::EmitInstruction(SUnit *SU) {
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}
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// reduce to a single unit
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unsigned freeUnit = 0;
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uint64_t freeUnit = 0;
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do {
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freeUnit = freeUnits;
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freeUnits = freeUnit & (freeUnit - 1);
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@ -138,7 +138,7 @@ SPUNopFiller::SPUOpPlace
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SPUNopFiller::getOpPlacement( MachineInstr &instr ) {
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int sc = instr.getDesc().getSchedClass();
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const InstrStage *stage = IID->beginStage(sc);
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unsigned FUs = stage->getUnits();
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uint64_t FUs = stage->getUnits();
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SPUOpPlace retval;
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switch( FUs ) {
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@ -3183,7 +3183,7 @@ bool HexagonPacketizerList::ignorePseudoInstruction(MachineInstr *MI,
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unsigned SchedClass = TID.getSchedClass();
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const InstrStage* IS =
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ResourceTracker->getInstrItins()->beginStage(SchedClass);
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unsigned FuncUnits = IS->getUnits();
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uint64_t FuncUnits = IS->getUnits();
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return !FuncUnits;
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}
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@ -379,8 +379,8 @@ void SubtargetEmitter::EmitStageAndOperandCycleData(raw_ostream &OS,
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<< "namespace " << Name << "FU {\n";
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for (unsigned j = 0, FUN = FUs.size(); j < FUN; ++j)
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OS << " const unsigned " << FUs[j]->getName()
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<< " = 1 << " << j << ";\n";
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OS << " const uint64_t " << FUs[j]->getName()
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<< " = 1ULL << " << j << ";\n";
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OS << "}\n";
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