mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-12-02 08:26:29 +00:00
fix PR7311 by avoiding breaking casts when a bitcast from scalar->vector
is involved. llvm-svn: 108117
This commit is contained in:
parent
c6f9c11878
commit
59bffe35a1
@ -2007,6 +2007,14 @@ unsigned CastInst::isEliminableCastPair(
|
||||
{ 5, 5, 5, 6, 6, 5, 5, 6, 6,11, 5, 1 }, // BitCast -+
|
||||
};
|
||||
|
||||
// If either of the casts are a bitcast from scalar to vector, disallow the
|
||||
// merging.
|
||||
if ((firstOp == Instruction::BitCast &&
|
||||
isa<VectorType>(SrcTy) != isa<VectorType>(MidTy)) ||
|
||||
(secondOp == Instruction::BitCast &&
|
||||
isa<VectorType>(MidTy) != isa<VectorType>(DstTy)))
|
||||
return 0; // Disallowed
|
||||
|
||||
int ElimCase = CastResults[firstOp-Instruction::CastOpsBegin]
|
||||
[secondOp-Instruction::CastOpsBegin];
|
||||
switch (ElimCase) {
|
||||
|
@ -638,3 +638,14 @@ define <4 x i32> @test62(<3 x float> %call4) nounwind {
|
||||
; CHECK-NEXT: ret
|
||||
}
|
||||
|
||||
; PR7311 - Don't create invalid IR on scalar->vector cast.
|
||||
define <2 x float> @test63(i64 %tmp8) nounwind {
|
||||
entry:
|
||||
%a = bitcast i64 %tmp8 to <2 x i32>
|
||||
%vcvt.i = uitofp <2 x i32> %a to <2 x float>
|
||||
ret <2 x float> %vcvt.i
|
||||
; CHECK: @test63
|
||||
; CHECK: bitcast
|
||||
; CHECK: uitofp
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user