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Fix <rdar://problem/9476260> by having tail calls always generate 32-bit branches
in Darwin Thumb2 code. Tail calls are already disabled on Thumb1. llvm-svn: 131894
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@ -1832,7 +1832,9 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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case ARM::tTAILJMPdND: {
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MCInst TmpInst, TmpInst2;
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LowerARMMachineInstrToMCInst(MI, TmpInst2, *this);
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TmpInst.setOpcode(ARM::tB);
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// The Darwin toolchain doesn't support tail call relocations of 16-bit
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// branches.
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TmpInst.setOpcode(Opc == ARM::tTAILJMPd ? ARM::t2B : ARM::tB);
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TmpInst.addOperand(TmpInst2.getOperand(0));
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OutStreamer.AddComment("TAILCALL");
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OutStreamer.EmitInstruction(TmpInst);
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@ -1,6 +1,6 @@
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; RUN: llc < %s -mtriple=armv6-apple-darwin -mattr=+vfp2 -arm-tail-calls | FileCheck %s -check-prefix=CHECKV6
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; RUN: llc < %s -mtriple=armv6-linux-gnueabi -relocation-model=pic -mattr=+vfp2 -arm-tail-calls | FileCheck %s -check-prefix=CHECKELF
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; RUN: llc < %s -mtriple=thumbv7-apple-darwin -arm-tail-calls | FileCheck %s -check-prefix=CHECKT2
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; RUN: llc < %s -mtriple=thumbv7-apple-darwin -arm-tail-calls | FileCheck %s -check-prefix=CHECKT2D
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@t = weak global i32 ()* null ; <i32 ()**> [#uses=1]
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@ -26,6 +26,9 @@ define void @t3() {
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; CHECKV6: b _t2 @ TAILCALL
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; CHECKELF: t3:
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; CHECKELF: b t2(PLT) @ TAILCALL
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; CHECKT2D: t3:
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; CHECKT2D: b.w _t2 @ TAILCALL
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tail call void @t2( ) ; <i32> [#uses=0]
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ret void
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}
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@ -71,10 +74,10 @@ declare void @foo() nounwind
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define void @t7() nounwind {
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entry:
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; CHECKT2: t7:
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; CHECKT2: blxeq _foo
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; CHECKT2-NEXT: pop.w
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; CHECKT2-NEXT: b _foo
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; CHECKT2D: t7:
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; CHECKT2D: blxeq _foo
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; CHECKT2D-NEXT: pop.w
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; CHECKT2D-NEXT: b.w _foo
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br i1 undef, label %bb, label %bb1.lr.ph
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bb1.lr.ph:
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