mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-02-12 15:51:35 +00:00
Cannot create a result register for non-legal types.
llvm-svn: 143749
This commit is contained in:
parent
f19ceebeaa
commit
5e54485e51
@ -552,8 +552,9 @@ unsigned ARMFastISel::ARMMaterializeInt(const Constant *C, EVT VT) {
|
||||
// do so now.
|
||||
const ConstantInt *CI = cast<ConstantInt>(C);
|
||||
if (Subtarget->hasV6T2Ops() && isUInt<16>(CI->getZExtValue())) {
|
||||
EVT SrcVT = MVT::i32;
|
||||
unsigned Opc = isThumb ? ARM::t2MOVi16 : ARM::MOVi16;
|
||||
unsigned ImmReg = createResultReg(TLI.getRegClassFor(VT));
|
||||
unsigned ImmReg = createResultReg(TLI.getRegClassFor(SrcVT));
|
||||
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
|
||||
TII.get(Opc), ImmReg)
|
||||
.addImm(CI->getSExtValue()));
|
||||
|
Loading…
x
Reference in New Issue
Block a user