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Fix more register and coalescing dependencies.
llvm-svn: 130859
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parent
780e6d1f64
commit
5ea6203ea6
@ -6,7 +6,6 @@ define weak void @make_foo(%struct.foo_t* noalias sret %agg.result, i32 %a, i32
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entry:
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;CHECK: make_foo
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;CHECK: ld [%fp+64], {{.+}}
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;CHECK: or {{.+}}, {{.+}}, %i0
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;CHECK: jmp %i7+12
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%0 = getelementptr inbounds %struct.foo_t* %agg.result, i32 0, i32 0
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store i32 %a, i32* %0, align 4
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@ -11,7 +11,7 @@
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define i32 @t(%struct.asl_file_t* %s, i64 %off, i64* %out) nounwind optsize {
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; CHECK: t:
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; CHECK: adds r0, #8
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; CHECK: adds {{r[0-7]}}, #8
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entry:
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%val = alloca i64, align 4 ; <i64*> [#uses=3]
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%0 = icmp eq %struct.asl_file_t* %s, null ; <i1> [#uses=1]
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@ -7,8 +7,8 @@ entry:
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; CHECK: Callee:
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; CHECK: push
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; CHECK: mov r4, sp
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; CHECK: sub.w r12, r4, #1000
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; CHECK: mov sp, r12
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; CHECK: sub.w [[R12:r[0-9]+]], r4, #1000
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; CHECK: mov sp, [[R12]]
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%0 = icmp eq i32 %i, 0 ; <i1> [#uses=1]
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br i1 %0, label %bb2, label %bb
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@ -30,9 +30,8 @@ entry:
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define i32 @f3(i32 %A, i32 %B) nounwind readnone optsize {
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entry:
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; CHECK: f3
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; CHECK: lsrs r2, r0, #7
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; CHECK: mov r0, r1
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; CHECK: bfi r0, r2, #7, #16
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; CHECK: lsrs {{.*}}, #7
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; CHECK: bfi {{.*}}, #7, #16
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%and = and i32 %A, 8388480 ; <i32> [#uses=1]
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%and2 = and i32 %B, -8388481 ; <i32> [#uses=1]
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%or = or i32 %and2, %and ; <i32> [#uses=1]
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@ -42,8 +41,8 @@ entry:
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; rdar://8752056
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define i32 @f4(i32 %a) nounwind {
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; CHECK: f4
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; CHECK: movw r1, #3137
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; CHECK: bfi r1, r0, #15, #5
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; CHECK: movw [[R1:r[0-9]+]], #3137
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; CHECK: bfi [[R1]], {{.*}}, #15, #5
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%1 = shl i32 %a, 15
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%ins7 = and i32 %1, 1015808
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%ins12 = or i32 %ins7, 3137
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