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The PowerPC VRSAVE register has been somewhat of an odd beast since

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the Altivec extensions were introduced.  Its use is optional, and
allows the compiler to communicate to the operating system which
vector registers should be saved and restored during a context switch.
In practice, this information is ignored by the various operating
systems using the SVR4 ABI; the kernel saves and restores the entire
register state.  Setting the VRSAVE register is no longer performed by
the AIX XL compilers, the IBM i compilers, or by GCC on Power Linux
systems.  It seems best to avoid this logic within LLVM as well.

This patch avoids generating code to update and restore VRSAVE for the
PowerPC SVR4 ABIs (32- and 64-bit).  The code remains in place for the
Darwin ABI.

llvm-svn: 165656
This commit is contained in:
Bill Schmidt 2012-10-10 20:54:15 +00:00
parent 5f526cf767
commit 5f0844eeb4
3 changed files with 29 additions and 6 deletions
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16
lib/Target/PowerPC/PPCFrameLowering.cpp
View File

@ -50,6 +50,11 @@ static const uint16_t VRRegNo[] = {
/// to manipulate the VRSAVE register, even though it uses vector registers.
/// This can happen when the only registers used are known to be live in or out
/// of the function. Remove all of the VRSAVE related code from the function.
/// FIXME: The removal of the code results in a compile failure at -O0 when the
/// function contains a function call, as the GPR containing original VRSAVE
/// contents is spilled and reloaded around the call. Without the prolog code,
/// the spill instruction refers to an undefined register. This code needs
/// to account for all uses of that GPR.
static void RemoveVRSaveCode(MachineInstr *MI) {
MachineBasicBlock *Entry = MI->getParent();
MachineFunction *MF = Entry->getParent();
@ -283,12 +288,13 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF) const {
// Scan the prolog, looking for an UPDATE_VRSAVE instruction. If we find it,
// process it.
for (unsigned i = 0; MBBI != MBB.end(); ++i, ++MBBI) {
if (MBBI->getOpcode() == PPC::UPDATE_VRSAVE) {
HandleVRSaveUpdate(MBBI, TII);
break;
if (!Subtarget.isSVR4ABI())
for (unsigned i = 0; MBBI != MBB.end(); ++i, ++MBBI) {
if (MBBI->getOpcode() == PPC::UPDATE_VRSAVE) {
HandleVRSaveUpdate(MBBI, TII);
break;
}
}
}
// Move MBBI back to the beginning of the function.
MBBI = MBB.begin();

4
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
View File

@ -53,7 +53,9 @@ namespace {
GlobalBaseReg = 0;
SelectionDAGISel::runOnMachineFunction(MF);
InsertVRSaveCode(MF);
if (!PPCSubTarget.isSVR4ABI())
InsertVRSaveCode(MF);
return true;
}

15
test/CodeGen/PowerPC/novrsave.ll Normal file
View File

@ -0,0 +1,15 @@
; RUN: llc -O0 -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s
; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s
; This verifies that the code to update VRSAVE has been removed for SVR4.
define <4 x float> @bar(<4 x float> %v) nounwind {
entry:
%v.addr = alloca <4 x float>, align 16
store <4 x float> %v, <4 x float>* %v.addr, align 16
%0 = load <4 x float>* %v.addr, align 16
ret <4 x float> %0
}
; CHECK-NOT: mfspr
; CHECK-NOT: mtspr