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https://github.com/RPCS3/llvm-mirror.git
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[X86][SSE] Added tests to ensure that consecutive loads including any/all volatiles are not combined
llvm-svn: 264225
This commit is contained in:
Simon Pilgrim
parent
082bed0b87
commit
618084030f
@ -202,6 +202,7 @@ define <4 x float> @merge_4f32_f32_45zz(float* %ptr) nounwind uwtable noinline s
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%res1 = insertelement <4 x float> %res0, float %val1, i32 1
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ret <4 x float> %res1
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}
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define <4 x float> @merge_4f32_f32_012u(float* %ptr) nounwind uwtable noinline ssp {
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; SSE2-LABEL: merge_4f32_f32_012u:
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; SSE2: # BB#0:
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@ -654,3 +655,90 @@ define void @merge_4i32_i32_combine(<4 x i32>* %dst, i32* %src) {
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store <4 x i32> %6, <4 x i32>* %dst
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ret void
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}
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;
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; consecutive loads including any/all volatiles may not be combined
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;
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define <2 x i64> @merge_2i64_i64_12_volatile(i64* %ptr) nounwind uwtable noinline ssp {
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; SSE-LABEL: merge_2i64_i64_12_volatile:
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; SSE: # BB#0:
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; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
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; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
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; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: merge_2i64_i64_12_volatile:
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; AVX: # BB#0:
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; AVX-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
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; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; AVX-NEXT: retq
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;
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; X32-SSE-LABEL: merge_2i64_i64_12_volatile:
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; X32-SSE: # BB#0:
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; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; X32-SSE-NEXT: pinsrd $1, 12(%eax), %xmm0
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; X32-SSE-NEXT: pinsrd $2, 16(%eax), %xmm0
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; X32-SSE-NEXT: pinsrd $3, 20(%eax), %xmm0
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; X32-SSE-NEXT: retl
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%ptr0 = getelementptr inbounds i64, i64* %ptr, i64 1
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%ptr1 = getelementptr inbounds i64, i64* %ptr, i64 2
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%val0 = load volatile i64, i64* %ptr0
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%val1 = load volatile i64, i64* %ptr1
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%res0 = insertelement <2 x i64> undef, i64 %val0, i32 0
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%res1 = insertelement <2 x i64> %res0, i64 %val1, i32 1
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ret <2 x i64> %res1
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}
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define <4 x float> @merge_4f32_f32_2345_volatile(float* %ptr) nounwind uwtable noinline ssp {
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; SSE2-LABEL: merge_4f32_f32_2345_volatile:
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; SSE2: # BB#0:
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; SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; SSE2-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; SSE2-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
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; SSE2-NEXT: movss {{.*#+}} xmm3 = mem[0],zero,zero,zero
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; SSE2-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
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; SSE2-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
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; SSE2-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: merge_4f32_f32_2345_volatile:
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; SSE41: # BB#0:
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; SSE41-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
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; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
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; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: merge_4f32_f32_2345_volatile:
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; AVX: # BB#0:
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; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
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; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
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; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
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; AVX-NEXT: retq
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;
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; X32-SSE-LABEL: merge_4f32_f32_2345_volatile:
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; X32-SSE: # BB#0:
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; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; X32-SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
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; X32-SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
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; X32-SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
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; X32-SSE-NEXT: retl
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%ptr0 = getelementptr inbounds float, float* %ptr, i64 2
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%ptr1 = getelementptr inbounds float, float* %ptr, i64 3
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%ptr2 = getelementptr inbounds float, float* %ptr, i64 4
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%ptr3 = getelementptr inbounds float, float* %ptr, i64 5
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%val0 = load volatile float, float* %ptr0
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%val1 = load float, float* %ptr1
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%val2 = load float, float* %ptr2
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%val3 = load float, float* %ptr3
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%res0 = insertelement <4 x float> undef, float %val0, i32 0
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%res1 = insertelement <4 x float> %res0, float %val1, i32 1
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%res2 = insertelement <4 x float> %res1, float %val2, i32 2
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%res3 = insertelement <4 x float> %res2, float %val3, i32 3
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ret <4 x float> %res3
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}
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@ -641,3 +641,116 @@ define <32 x i8> @merge_32i8_i8_23u5uuuuuuuuuuzzzzuuuuuuuuuuuuuu(i8* %ptr) nounw
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%resH = insertelement <32 x i8> %resG, i8 0, i8 17
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ret <32 x i8> %resH
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}
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;
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; consecutive loads including any/all volatiles may not be combined
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;
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define <4 x double> @merge_4f64_f64_34uz_volatile(double* %ptr) nounwind uwtable noinline ssp {
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; AVX1-LABEL: merge_4f64_f64_34uz_volatile:
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; AVX1: # BB#0:
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; AVX1-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; AVX1-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
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; AVX1-NEXT: vxorpd %xmm1, %xmm1, %xmm1
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; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: merge_4f64_f64_34uz_volatile:
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; AVX2: # BB#0:
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; AVX2-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; AVX2-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
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; AVX2-NEXT: vxorpd %xmm1, %xmm1, %xmm1
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; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; AVX2-NEXT: retq
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;
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; AVX512F-LABEL: merge_4f64_f64_34uz_volatile:
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; AVX512F: # BB#0:
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; AVX512F-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; AVX512F-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
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; AVX512F-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; AVX512F-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; AVX512F-NEXT: retq
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;
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; X32-AVX-LABEL: merge_4f64_f64_34uz_volatile:
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; X32-AVX: # BB#0:
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; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; X32-AVX-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
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; X32-AVX-NEXT: vxorpd %xmm1, %xmm1, %xmm1
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; X32-AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; X32-AVX-NEXT: retl
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%ptr0 = getelementptr inbounds double, double* %ptr, i64 3
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%ptr1 = getelementptr inbounds double, double* %ptr, i64 4
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%val0 = load volatile double, double* %ptr0
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%val1 = load volatile double, double* %ptr1
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%res0 = insertelement <4 x double> undef, double %val0, i32 0
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%res1 = insertelement <4 x double> %res0, double %val1, i32 1
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%res3 = insertelement <4 x double> %res1, double 0.0, i32 3
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ret <4 x double> %res3
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}
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define <16 x i16> @merge_16i16_i16_0uu3zzuuuuuzCuEF_volatile(i16* %ptr) nounwind uwtable noinline ssp {
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; AVX1-LABEL: merge_16i16_i16_0uu3zzuuuuuzCuEF_volatile:
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; AVX1: # BB#0:
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; AVX1-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; AVX1-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm1
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; AVX1-NEXT: vpinsrw $3, 6(%rdi), %xmm1, %xmm1
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; AVX1-NEXT: vpinsrw $4, 24(%rdi), %xmm0, %xmm0
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; AVX1-NEXT: vpinsrw $6, 28(%rdi), %xmm0, %xmm0
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; AVX1-NEXT: vpinsrw $7, 30(%rdi), %xmm0, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: merge_16i16_i16_0uu3zzuuuuuzCuEF_volatile:
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; AVX2: # BB#0:
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; AVX2-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; AVX2-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm1
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; AVX2-NEXT: vpinsrw $3, 6(%rdi), %xmm1, %xmm1
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; AVX2-NEXT: vpinsrw $4, 24(%rdi), %xmm0, %xmm0
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; AVX2-NEXT: vpinsrw $6, 28(%rdi), %xmm0, %xmm0
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; AVX2-NEXT: vpinsrw $7, 30(%rdi), %xmm0, %xmm0
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; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
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; AVX2-NEXT: retq
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;
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; AVX512F-LABEL: merge_16i16_i16_0uu3zzuuuuuzCuEF_volatile:
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; AVX512F: # BB#0:
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; AVX512F-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; AVX512F-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm1
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; AVX512F-NEXT: vpinsrw $3, 6(%rdi), %xmm1, %xmm1
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; AVX512F-NEXT: vpinsrw $4, 24(%rdi), %xmm0, %xmm0
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; AVX512F-NEXT: vpinsrw $6, 28(%rdi), %xmm0, %xmm0
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; AVX512F-NEXT: vpinsrw $7, 30(%rdi), %xmm0, %xmm0
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; AVX512F-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
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; AVX512F-NEXT: retq
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;
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; X32-AVX-LABEL: merge_16i16_i16_0uu3zzuuuuuzCuEF_volatile:
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; X32-AVX: # BB#0:
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; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-AVX-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; X32-AVX-NEXT: vpinsrw $0, (%eax), %xmm0, %xmm1
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; X32-AVX-NEXT: vpinsrw $3, 6(%eax), %xmm1, %xmm1
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; X32-AVX-NEXT: vpinsrw $4, 24(%eax), %xmm0, %xmm0
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; X32-AVX-NEXT: vpinsrw $6, 28(%eax), %xmm0, %xmm0
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; X32-AVX-NEXT: vpinsrw $7, 30(%eax), %xmm0, %xmm0
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; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
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; X32-AVX-NEXT: retl
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%ptr0 = getelementptr inbounds i16, i16* %ptr, i64 0
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%ptr3 = getelementptr inbounds i16, i16* %ptr, i64 3
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%ptrC = getelementptr inbounds i16, i16* %ptr, i64 12
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%ptrE = getelementptr inbounds i16, i16* %ptr, i64 14
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%ptrF = getelementptr inbounds i16, i16* %ptr, i64 15
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%val0 = load volatile i16, i16* %ptr0
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%val3 = load i16, i16* %ptr3
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%valC = load i16, i16* %ptrC
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%valE = load i16, i16* %ptrE
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%valF = load volatile i16, i16* %ptrF
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%res0 = insertelement <16 x i16> undef, i16 %val0, i16 0
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%res3 = insertelement <16 x i16> %res0, i16 %val3, i16 3
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%res4 = insertelement <16 x i16> %res3, i16 0, i16 4
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%res5 = insertelement <16 x i16> %res4, i16 0, i16 5
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%resC = insertelement <16 x i16> %res5, i16 %valC, i16 12
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%resD = insertelement <16 x i16> %resC, i16 0, i16 13
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%resE = insertelement <16 x i16> %resD, i16 %valE, i16 14
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%resF = insertelement <16 x i16> %resE, i16 %valF, i16 15
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ret <16 x i16> %resF
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}
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@ -642,3 +642,77 @@ define <64 x i8> @merge_64i8_i8_12u4uuuuuuuuuuzzzzuuuuuuuuuuuuuuuuuuuuuuuuuuuuuu
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%res63 = insertelement <64 x i8> %res17, i8 0, i8 63
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ret <64 x i8> %res63
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}
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;
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; consecutive loads including any/all volatiles may not be combined
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;
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define <8 x double> @merge_8f64_f64_23uuuuu9_volatile(double* %ptr) nounwind uwtable noinline ssp {
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; ALL-LABEL: merge_8f64_f64_23uuuuu9_volatile:
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; ALL: # BB#0:
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; ALL-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; ALL-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
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; ALL-NEXT: vbroadcastsd 72(%rdi), %ymm1
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; ALL-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0
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; ALL-NEXT: retq
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;
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; X32-AVX512F-LABEL: merge_8f64_f64_23uuuuu9_volatile:
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; X32-AVX512F: # BB#0:
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; X32-AVX512F-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-AVX512F-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; X32-AVX512F-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
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; X32-AVX512F-NEXT: vbroadcastsd 72(%eax), %ymm1
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; X32-AVX512F-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0
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; X32-AVX512F-NEXT: retl
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%ptr0 = getelementptr inbounds double, double* %ptr, i64 2
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%ptr1 = getelementptr inbounds double, double* %ptr, i64 3
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%ptr7 = getelementptr inbounds double, double* %ptr, i64 9
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%val0 = load volatile double, double* %ptr0
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%val1 = load double, double* %ptr1
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%val7 = load double, double* %ptr7
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%res0 = insertelement <8 x double> undef, double %val0, i32 0
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%res1 = insertelement <8 x double> %res0, double %val1, i32 1
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%res7 = insertelement <8 x double> %res1, double %val7, i32 7
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ret <8 x double> %res7
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}
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define <16 x i32> @merge_16i32_i32_0uu3uuuuuuuuCuEF_volatile(i32* %ptr) nounwind uwtable noinline ssp {
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; ALL-LABEL: merge_16i32_i32_0uu3uuuuuuuuCuEF_volatile:
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; ALL: # BB#0:
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; ALL-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; ALL-NEXT: vpinsrd $3, 12(%rdi), %xmm0, %xmm0
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; ALL-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; ALL-NEXT: vpinsrd $2, 56(%rdi), %xmm1, %xmm1
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; ALL-NEXT: vpinsrd $3, 60(%rdi), %xmm1, %xmm1
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; ALL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm1
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; ALL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
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; ALL-NEXT: retq
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;
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; X32-AVX512F-LABEL: merge_16i32_i32_0uu3uuuuuuuuCuEF_volatile:
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; X32-AVX512F: # BB#0:
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; X32-AVX512F-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-AVX512F-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; X32-AVX512F-NEXT: vpinsrd $3, 12(%eax), %xmm0, %xmm0
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; X32-AVX512F-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; X32-AVX512F-NEXT: vpinsrd $2, 56(%eax), %xmm1, %xmm1
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; X32-AVX512F-NEXT: vpinsrd $3, 60(%eax), %xmm1, %xmm1
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; X32-AVX512F-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm1
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; X32-AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
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; X32-AVX512F-NEXT: retl
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%ptr0 = getelementptr inbounds i32, i32* %ptr, i64 0
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%ptr3 = getelementptr inbounds i32, i32* %ptr, i64 3
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%ptrC = getelementptr inbounds i32, i32* %ptr, i64 12
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%ptrE = getelementptr inbounds i32, i32* %ptr, i64 14
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%ptrF = getelementptr inbounds i32, i32* %ptr, i64 15
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%val0 = load volatile i32, i32* %ptr0
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%val3 = load volatile i32, i32* %ptr3
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%valC = load volatile i32, i32* %ptrC
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%valE = load volatile i32, i32* %ptrE
|
||||
%valF = load volatile i32, i32* %ptrF
|
||||
%res0 = insertelement <16 x i32> undef, i32 %val0, i32 0
|
||||
%res3 = insertelement <16 x i32> %res0, i32 %val3, i32 3
|
||||
%resC = insertelement <16 x i32> %res3, i32 %valC, i32 12
|
||||
%resE = insertelement <16 x i32> %resC, i32 %valE, i32 14
|
||||
%resF = insertelement <16 x i32> %resE, i32 %valF, i32 15
|
||||
ret <16 x i32> %resF
|
||||
}
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user