RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-02-11 23:37:39 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Add encoding bits "let Inst{11-4} = 0b00000000;" to BR_JTr to disambiguate

Browse Source 
between BR_JTr and STREXD.

llvm-svn: 91339
This commit is contained in:
Johnny Chen 2009-12-14 21:51:34 +00:00
parent 66fc3eb99d
commit 61b6d221d2
1 changed files with 1 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
lib/Target/ARM/ARMInstrInfo.td
View File

@ -786,6 +786,7 @@ let isBranch = 1, isTerminator = 1 in {
def BR_JTr : JTI<(outs), (ins GPR:$target, jtblock_operand:$jt, i32imm:$id),
IIC_Br, "mov\tpc, $target \n$jt",
[(ARMbrjt GPR:$target, tjumptable:$jt, imm:$id)]> {
let Inst{11-4} = 0b00000000;
let Inst{15-12} = 0b1111;
let Inst{20} = 0; // S Bit
let Inst{24-21} = 0b1101;