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Rename CB/CBZ specific fixup accordingly.
llvm-svn: 121404
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@ -1556,7 +1556,7 @@ unsigned ARMELFObjectWriter::GetRelocType(const MCValue &Target,
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case ARM::fixup_arm_pcrel_10:
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case ARM::fixup_arm_adr_pcrel_12:
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case ARM::fixup_arm_thumb_bl:
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case ARM::fixup_arm_thumb_br:
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case ARM::fixup_arm_thumb_cb:
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case ARM::fixup_arm_thumb_cp:
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assert(0 && "Unimplemented"); break;
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case ARM::fixup_arm_branch:
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@ -194,7 +194,7 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
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// 'off by 4' is implicitly handled by the half-word ordering of the
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// Thumb encoding, so we only need to adjust by 2 here.
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return ((Value - 2) >> 2) & 0xff;
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case ARM::fixup_arm_thumb_br: {
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case ARM::fixup_arm_thumb_cb: {
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// Offset by 4 and don't encode the lower bit, which is always 0.
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uint32_t Binary = (Value - 4) >> 1;
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return ((Binary & 0x20) << 9) | ((Binary & 0x1f) << 3);
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@ -312,7 +312,7 @@ static unsigned getFixupKindNumBytes(unsigned Kind) {
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case ARM::fixup_arm_thumb_cp:
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return 1;
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case ARM::fixup_arm_thumb_br:
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case ARM::fixup_arm_thumb_cb:
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return 2;
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case ARM::fixup_arm_ldst_pcrel_12:
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@ -46,8 +46,8 @@ enum Fixups {
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// fixup_arm_thumb_blx - Fixup for Thumb BLX instructions.
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fixup_arm_thumb_blx,
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// fixup_arm_thumb_br - Fixup for Thumb branch instructions.
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fixup_arm_thumb_br,
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// fixup_arm_thumb_cb - Fixup for Thumb branch instructions.
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fixup_arm_thumb_cb,
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// fixup_arm_thumb_cp - Fixup for Thumb load/store from constant pool instrs.
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fixup_arm_thumb_cp,
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@ -55,7 +55,7 @@ public:
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{ "fixup_t2_branch", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_arm_thumb_bl", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_arm_thumb_blx", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_arm_thumb_br", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_arm_thumb_cb", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_arm_thumb_cp", 1, 8, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_arm_movt_hi16", 0, 16, 0 },
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{ "fixup_arm_movw_lo16", 0, 16, 0 },
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@ -462,7 +462,7 @@ getThumbBLXTargetOpValue(const MCInst &MI, unsigned OpIdx,
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uint32_t ARMMCCodeEmitter::
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getThumbCBTargetOpValue(const MCInst &MI, unsigned OpIdx,
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SmallVectorImpl<MCFixup> &Fixups) const {
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return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_br, Fixups);
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return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_cb, Fixups);
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}
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/// getBranchTargetOpValue - Return encoding info for 24-bit immediate branch
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