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[X86][SKX][KNL] Updating several CodeGen tests to use the attr flag instead of mcpu flag
NFC. Updated 3 Codegen regression tests to use the -mattr flag instead of the -mcpu flags as follows: Instead of -mcpu=skx use -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq Instead of -mcpu=knl use -mattr=+avx512f Reviewers: delena Revision: https://reviews.llvm.org/D37674 llvm-svn: 312909
This commit is contained in:
Gadi Haber
parent
ff00b0b024
commit
624f0afbec
@ -1,6 +1,6 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx2 -show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX2
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; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VL
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; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq -show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VL
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define <16 x i16> @test_x86_avx2_packssdw(<8 x i32> %a0, <8 x i32> %a1) {
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; AVX2-LABEL: test_x86_avx2_packssdw:
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@ -1619,10 +1619,10 @@ define <8 x float> @test_gather_mask(<8 x float> %a0, float* %a, <8 x i32> %idx
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;
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; AVX512VL-LABEL: test_gather_mask:
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; AVX512VL: ## BB#0:
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; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
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; AVX512VL-NEXT: vmovaps %ymm2, %ymm3 ## EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xda]
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; AVX512VL-NEXT: vgatherdps %ymm3, (%eax,%ymm1,4), %ymm0 ## encoding: [0xc4,0xe2,0x65,0x92,0x04,0x88]
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; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
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; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
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; AVX512VL-NEXT: vmovaps %ymm2, %ymm3 ## EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xda]
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; AVX512VL-NEXT: vgatherdps %ymm3, (%ecx,%ymm1,4), %ymm0 ## encoding: [0xc4,0xe2,0x65,0x92,0x04,0x89]
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; AVX512VL-NEXT: vmovups %ymm2, (%eax) ## EVEX TO VEX Compression encoding: [0xc5,0xfc,0x11,0x10]
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; AVX512VL-NEXT: retl ## encoding: [0xc3]
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%a_i8 = bitcast float* %a to i8*
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@ -1,6 +1,6 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=ALL --check-prefix=KNL
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=ALL --check-prefix=SKX
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=KNL
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=SKX
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define double @test1(double %a, double %b) nounwind {
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; ALL-LABEL: test1:
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@ -126,11 +126,11 @@ entry:
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define i32 @test8(i32 %a1, i32 %a2, i32 %a3) {
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; ALL-LABEL: test8:
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; ALL: ## BB#0:
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; ALL-NEXT: notl %edi
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; ALL-NEXT: xorl $-2147483648, %esi ## imm = 0x80000000
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; ALL-NEXT: testl %edx, %edx
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; ALL-NEXT: movl $1, %eax
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; ALL-NEXT: cmovel %eax, %edx
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; ALL-NEXT: notl %edi
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; ALL-NEXT: orl %edi, %esi
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; ALL-NEXT: cmovnel %edx, %eax
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; ALL-NEXT: retq
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@ -1,6 +1,7 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mcpu=skx | FileCheck %s -check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=skx | FileCheck %s -check-prefix=X64
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s -check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s -check-prefix=X64
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; According to https://bugs.llvm.org/show_bug.cgi?id=32329 it checks DAG ISEL failure on SKX target
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%struct.AA = type { i24, [4 x i8] }
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@ -36,33 +37,33 @@ define void @foo() local_unnamed_addr {
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; X86-NEXT: .cfi_offset %ebx, -12
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; X86-NEXT: .Lcfi7:
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; X86-NEXT: .cfi_offset %ebp, -8
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; X86-NEXT: movl obj, %edx
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; X86-NEXT: movsbl var_27, %eax
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; X86-NEXT: movzwl var_2, %esi
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; X86-NEXT: movl var_310, %ecx
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; X86-NEXT: imull %eax, %ecx
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; X86-NEXT: movl obj, %esi
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; X86-NEXT: addl var_24, %ecx
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; X86-NEXT: movzwl var_2, %edi
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; X86-NEXT: andl $4194303, %esi # imm = 0x3FFFFF
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; X86-NEXT: leal (%esi,%esi), %edx
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; X86-NEXT: subl %eax, %edx
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; X86-NEXT: movl %edx, %ebx
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; X86-NEXT: subl %edi, %ebx
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; X86-NEXT: imull %ebx, %ecx
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; X86-NEXT: andl $4194303, %edx # imm = 0x3FFFFF
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; X86-NEXT: leal (%edx,%edx), %ebx
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; X86-NEXT: subl %eax, %ebx
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; X86-NEXT: movl %ebx, %edi
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; X86-NEXT: subl %esi, %edi
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; X86-NEXT: imull %edi, %ecx
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; X86-NEXT: addl $-1437483407, %ecx # imm = 0xAA51BE71
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; X86-NEXT: movl $9, %edi
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; X86-NEXT: movl $9, %esi
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; X86-NEXT: xorl %ebp, %ebp
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; X86-NEXT: shldl %cl, %edi, %ebp
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; X86-NEXT: shlxl %ecx, %edi, %edi
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; X86-NEXT: shldl %cl, %esi, %ebp
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; X86-NEXT: shll %cl, %esi
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; X86-NEXT: testb $32, %cl
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; X86-NEXT: cmovnel %edi, %ebp
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; X86-NEXT: cmovnel %esi, %ebp
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; X86-NEXT: movl $0, %ecx
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; X86-NEXT: cmovnel %ecx, %edi
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; X86-NEXT: cmovnel %ecx, %esi
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; X86-NEXT: cmpl %edx, %edi
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; X86-NEXT: movl %ebp, var_50+4
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; X86-NEXT: cmpl %esi, %ebx
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; X86-NEXT: movl %esi, var_50
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; X86-NEXT: setge var_205
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; X86-NEXT: imull %eax, %edx
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; X86-NEXT: movl %edi, var_50
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; X86-NEXT: movb %dl, var_218
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; X86-NEXT: imull %eax, %ebx
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; X86-NEXT: movb %bl, var_218
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: popl %ebx
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@ -71,25 +72,26 @@ define void @foo() local_unnamed_addr {
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;
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; X64-LABEL: foo:
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; X64: # BB#0: # %entry
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; X64-NEXT: movsbl {{.*}}(%rip), %eax
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; X64-NEXT: movl {{.*}}(%rip), %ecx
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; X64-NEXT: imull %eax, %ecx
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; X64-NEXT: movl {{.*}}(%rip), %edx
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; X64-NEXT: addl {{.*}}(%rip), %ecx
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; X64-NEXT: movl {{.*}}(%rip), %eax
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; X64-NEXT: movsbl {{.*}}(%rip), %r9d
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; X64-NEXT: movzwl {{.*}}(%rip), %r8d
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; X64-NEXT: andl $4194303, %edx # imm = 0x3FFFFF
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; X64-NEXT: leal (%rdx,%rdx), %edi
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; X64-NEXT: subl %eax, %edi
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; X64-NEXT: movl {{.*}}(%rip), %ecx
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; X64-NEXT: imull %r9d, %ecx
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; X64-NEXT: addl {{.*}}(%rip), %ecx
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; X64-NEXT: andl $4194303, %eax # imm = 0x3FFFFF
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; X64-NEXT: leal (%rax,%rax), %edi
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; X64-NEXT: subl %r9d, %edi
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; X64-NEXT: movl %edi, %esi
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; X64-NEXT: subl %r8d, %esi
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; X64-NEXT: imull %esi, %ecx
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; X64-NEXT: addl $-1437483407, %ecx # imm = 0xAA51BE71
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; X64-NEXT: movl $9, %r8d
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; X64-NEXT: cmpl %edx, %esi
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; X64-NEXT: movl $9, %edx
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; X64-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
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; X64-NEXT: shlq %cl, %rdx
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; X64-NEXT: movq %rdx, {{.*}}(%rip)
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; X64-NEXT: cmpl %eax, %esi
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; X64-NEXT: setge {{.*}}(%rip)
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; X64-NEXT: shlxq %rcx, %r8, %rcx
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; X64-NEXT: imull %eax, %edi
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; X64-NEXT: movq %rcx, {{.*}}(%rip)
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; X64-NEXT: imull %r9d, %edi
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; X64-NEXT: movb %dil, {{.*}}(%rip)
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; X64-NEXT: retq
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entry:
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