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https://github.com/RPCS3/llvm-mirror.git
synced 2024-12-23 12:08:25 +00:00
Implement Subtarget support
Implement the X86 Subtarget. This consolidates the checks for target triple, and setting options based on target triple into one place. This allows us to convert the asm printer and isel over from being littered with "forDarwin", "forCygwin", etc. into just having the appropriate flags for each subtarget feature controlling the code for that feature. This patch also implements indirect external and weak references in the X86 pattern isel, for darwin. Next up is to convert over the asm printers to use this new interface. llvm-svn: 22389
This commit is contained in:
parent
faf9b5b763
commit
626fb671c8
@ -19,6 +19,7 @@
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namespace llvm {
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namespace llvm {
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class TargetSubtarget;
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class TargetInstrInfo;
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class TargetInstrInfo;
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class TargetInstrDescriptor;
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class TargetInstrDescriptor;
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class TargetJITInfo;
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class TargetJITInfo;
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@ -97,6 +98,13 @@ public:
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virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
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virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
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const TargetData &getTargetData() const { return DataLayout; }
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const TargetData &getTargetData() const { return DataLayout; }
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virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
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template<typename STC> STC *getSubtarget() const {
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assert(getSubtargetImpl() && dynamic_cast<STC*>(getSubtargetImpl()) &&
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"Not the right kind of subtarget!");
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return (STC*)getSubtargetImpl();
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}
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/// getRegisterInfo - If register information is available, return it. If
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/// getRegisterInfo - If register information is available, return it. If
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/// not, return null. This is kept separate from RegInfo until RegInfo has
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/// not, return null. This is kept separate from RegInfo until RegInfo has
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/// details of graph coloring register allocation removed from it.
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/// details of graph coloring register allocation removed from it.
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41
include/llvm/Target/TargetSubtarget.h
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41
include/llvm/Target/TargetSubtarget.h
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@ -0,0 +1,41 @@
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//==-- llvm/Target/TargetSubtarget.h - Target Information --------*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Nate Begeman and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the subtarget options of a Target machine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_TARGETSUBTARGET_H
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#define LLVM_TARGET_TARGETSUBTARGET_H
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namespace llvm {
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class Module;
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//===----------------------------------------------------------------------===//
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///
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/// TargetSubtarget - Generic base class for all target subtargets. All
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/// Target-specific options that control code generation and printing should
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/// be exposed through a TargetSubtarget-derived class.
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///
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class TargetSubtarget {
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TargetSubtarget(const TargetSubtarget&); // DO NOT IMPLEMENT
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void operator=(const TargetSubtarget&); // DO NOT IMPLEMENT
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protected: // Can only create subclasses...
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/// This constructor initializes the data members to match that
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/// of the specified module.
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///
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TargetSubtarget(const Module &M);
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public:
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virtual ~TargetSubtarget();
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};
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} // End llvm namespace
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#endif
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22
lib/Target/TargetSubtarget.cpp
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lib/Target/TargetSubtarget.cpp
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//===-- TargetSubtarget.cpp - General Target Information -------------------==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Nate Begeman and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the general parts of a Subtarget.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Target/TargetSubtarget.h"
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using namespace llvm;
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//---------------------------------------------------------------------------
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// TargetSubtarget Class
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//
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TargetSubtarget::TargetSubtarget(const Module &M) {}
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TargetSubtarget::~TargetSubtarget() {}
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@ -14,6 +14,7 @@
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#include "X86.h"
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#include "X86.h"
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#include "X86InstrBuilder.h"
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#include "X86InstrBuilder.h"
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#include "X86RegisterInfo.h"
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#include "X86RegisterInfo.h"
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#include "X86Subtarget.h"
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#include "llvm/CallingConv.h"
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#include "llvm/CallingConv.h"
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#include "llvm/Constants.h"
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#include "llvm/Constants.h"
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#include "llvm/Instructions.h"
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#include "llvm/Instructions.h"
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#include "llvm/CodeGen/SSARegMap.h"
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#include "llvm/CodeGen/SSARegMap.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Support/CFG.h"
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#include "llvm/Support/CFG.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/MathExtras.h"
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@ -996,8 +998,13 @@ namespace {
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/// TheDAG - The DAG being selected during Select* operations.
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/// TheDAG - The DAG being selected during Select* operations.
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SelectionDAG *TheDAG;
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SelectionDAG *TheDAG;
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/// Subtarget - Keep a pointer to the X86Subtarget around so that we can
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/// make the right decision when generating code for different targets.
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const X86Subtarget *Subtarget;
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public:
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public:
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ISel(TargetMachine &TM) : SelectionDAGISel(X86Lowering), X86Lowering(TM) {
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ISel(TargetMachine &TM) : SelectionDAGISel(X86Lowering), X86Lowering(TM) {
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Subtarget = TM.getSubtarget<const X86Subtarget>();
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}
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}
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virtual const char *getPassName() const {
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virtual const char *getPassName() const {
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@ -1314,8 +1321,18 @@ bool ISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM) {
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break;
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break;
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case ISD::GlobalAddress:
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case ISD::GlobalAddress:
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if (AM.GV == 0) {
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if (AM.GV == 0) {
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AM.GV = cast<GlobalAddressSDNode>(N)->getGlobal();
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GlobalValue *GV = cast<GlobalAddressSDNode>(N)->getGlobal();
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return false;
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// For Darwin, external and weak symbols are indirect, so we want to load
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// the value at address GV, not the value of GV itself. This means that
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// the GlobalAddress must be in the base or index register of the address,
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// not the GV offset field.
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if (Subtarget->getIndirectExternAndWeakGlobals() &&
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(GV->hasWeakLinkage() || GV->isExternal())) {
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break;
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} else {
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AM.GV = GV;
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return false;
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}
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}
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}
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break;
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break;
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case ISD::Constant:
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case ISD::Constant:
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@ -2236,7 +2253,15 @@ unsigned ISel::SelectExpr(SDOperand N) {
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return Result;
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return Result;
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case ISD::GlobalAddress: {
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case ISD::GlobalAddress: {
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GlobalValue *GV = cast<GlobalAddressSDNode>(N)->getGlobal();
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GlobalValue *GV = cast<GlobalAddressSDNode>(N)->getGlobal();
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BuildMI(BB, X86::MOV32ri, 1, Result).addGlobalAddress(GV);
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// For Darwin, external and weak symbols are indirect, so we want to load
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// the value at address GV, not the value of GV itself.
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if (Subtarget->getIndirectExternAndWeakGlobals() &&
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(GV->hasWeakLinkage() || GV->isExternal())) {
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BuildMI(BB, X86::MOV32rm, 4, Result).addReg(0).addZImm(1).addReg(0)
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.addGlobalAddress(GV, false, 0);
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} else {
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BuildMI(BB, X86::MOV32ri, 1, Result).addGlobalAddress(GV);
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}
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return Result;
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return Result;
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}
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}
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case ISD::ExternalSymbol: {
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case ISD::ExternalSymbol: {
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59
lib/Target/X86/X86Subtarget.cpp
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59
lib/Target/X86/X86Subtarget.cpp
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//===- X86Subtarget.cpp - X86 Instruction Information -----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Nate Begeman and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the X86 specific subclass of TargetSubtarget.
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//
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//===----------------------------------------------------------------------===//
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#include "X86Subtarget.h"
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#include "llvm/Module.h"
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using namespace llvm;
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X86Subtarget::X86Subtarget(const Module &M)
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: TargetSubtarget(M), stackAlignment(8),
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indirectExternAndWeakGlobals(false), asmDarwinLinkerStubs(false),
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asmLeadingUnderscore(false), asmAlignmentIsInBytes(false),
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asmPrintDotLocalConstants(false), asmPrintDotLCommConstants(false),
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asmPrintConstantAlignment(false) {
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// Declare a boolean for each platform
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bool forCygwin = false;
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bool forDarwin = false;
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bool forWindows = false;
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// Set the boolean corresponding to the current target triple, or the default
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// if one cannot be determined, to true.
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const std::string& TT = M.getTargetTriple();
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if (TT.length() > 5) {
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forCygwin = TT.find("cygwin") != std::string::npos ||
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TT.find("mingw") != std::string::npos;
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forDarwin = TT.find("darwin") != std::string::npos;
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forWindows = TT.find("win32") != std::string::npos;
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} else if (TT.empty()) {
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#if defined(__CYGWIN__) || defined(__MINGW32__)
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forCygwin = true;
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#elif defined(__APPLE__)
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forDarwin = true;
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#elif defined(_WIN32)
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forWindws = true;
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#endif
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}
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if (forCygwin) {
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asmLeadingUnderscore = true;
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}
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if (forDarwin) {
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stackAlignment = 16;
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indirectExternAndWeakGlobals = true;
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asmDarwinLinkerStubs = true;
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asmLeadingUnderscore = true;
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asmPrintDotLCommConstants = true;
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}
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if (forWindows) {
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}
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}
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55
lib/Target/X86/X86Subtarget.h
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55
lib/Target/X86/X86Subtarget.h
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//=====-- X86Subtarget.h - Define TargetMachine for the X86 ---*- C++ -*--====//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Nate Begeman and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the X86 specific subclass of TargetSubtarget.
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//
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//===----------------------------------------------------------------------===//
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#ifndef X86SUBTARGET_H
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#define X86SUBTARGET_H
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#include "llvm/Target/TargetSubtarget.h"
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namespace llvm {
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class Module;
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class X86Subtarget : public TargetSubtarget {
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protected:
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/// Used by the target machine to set up the target frame info
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unsigned stackAlignment;
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/// Used by instruction selector
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bool indirectExternAndWeakGlobals;
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/// Used by the asm printer
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bool asmDarwinLinkerStubs;
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bool asmLeadingUnderscore;
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bool asmAlignmentIsInBytes;
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bool asmPrintDotLocalConstants;
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bool asmPrintDotLCommConstants;
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bool asmPrintConstantAlignment;
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public:
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/// This constructor initializes the data members to match that
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/// of the specified module.
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///
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X86Subtarget(const Module &M);
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/// Returns the preferred stack alignment for the current target triple, or
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/// the default if no target triple is set.
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unsigned getStackAlignment() const { return stackAlignment; }
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/// Returns true if the instruction selector should treat global values
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/// referencing external or weak symbols as indirect rather than direct
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/// references.
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bool getIndirectExternAndWeakGlobals() const {
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return indirectExternAndWeakGlobals; }
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};
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} // End llvm namespace
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#endif
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///
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///
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X86TargetMachine::X86TargetMachine(const Module &M, IntrinsicLowering *IL)
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X86TargetMachine::X86TargetMachine(const Module &M, IntrinsicLowering *IL)
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: TargetMachine("X86", IL, true, 4, 4, 4, 4, 4),
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: TargetMachine("X86", IL, true, 4, 4, 4, 4, 4),
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FrameInfo(TargetFrameInfo::StackGrowsDown, 8, -4),
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Subtarget(M),
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FrameInfo(TargetFrameInfo::StackGrowsDown,
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Subtarget.getStackAlignment(), -4),
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JITInfo(*this) {
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JITInfo(*this) {
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// Scalar SSE FP requires at least SSE2
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// Scalar SSE FP requires at least SSE2
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X86ScalarSSE &= X86Vector >= SSE2;
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X86ScalarSSE &= X86Vector >= SSE2;
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#include "llvm/PassManager.h"
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#include "llvm/PassManager.h"
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#include "X86InstrInfo.h"
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#include "X86InstrInfo.h"
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#include "X86JITInfo.h"
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#include "X86JITInfo.h"
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#include "X86Subtarget.h"
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namespace llvm {
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namespace llvm {
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class IntrinsicLowering;
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class IntrinsicLowering;
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class X86TargetMachine : public TargetMachine {
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class X86TargetMachine : public TargetMachine {
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X86InstrInfo InstrInfo;
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X86InstrInfo InstrInfo;
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X86Subtarget Subtarget;
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TargetFrameInfo FrameInfo;
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TargetFrameInfo FrameInfo;
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X86JITInfo JITInfo;
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X86JITInfo JITInfo;
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public:
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public:
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virtual const X86InstrInfo *getInstrInfo() const { return &InstrInfo; }
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virtual const X86InstrInfo *getInstrInfo() const { return &InstrInfo; }
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virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; }
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virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; }
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virtual TargetJITInfo *getJITInfo() { return &JITInfo; }
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virtual TargetJITInfo *getJITInfo() { return &JITInfo; }
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virtual const TargetSubtarget *getSubtargetImpl() const{ return &Subtarget; }
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virtual const MRegisterInfo *getRegisterInfo() const {
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virtual const MRegisterInfo *getRegisterInfo() const {
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return &InstrInfo.getRegisterInfo();
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return &InstrInfo.getRegisterInfo();
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}
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}
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