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Fix a bug in the local allocator's liveness computation where it
was setting kill flags on tied uses in two-address instructions. The kill flags were causing the allocator to think it could allocate the use and its tied def in different registers. llvm-svn: 57039
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@ -651,9 +651,11 @@ void RALocal::ComputeLocalLiveness(MachineBasicBlock& MBB) {
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// Physical registers and those that are not live-out of the block
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// are killed/dead at their last use/def within this block.
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if (isPhysReg || !usedOutsideBlock) {
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if (MO.isUse())
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MO.setIsKill(true);
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else
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if (MO.isUse()) {
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// Don't mark uses that are tied to defs as kills.
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if (MI->getDesc().getOperandConstraint(idx, TOI::TIED_TO) == -1)
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MO.setIsKill(true);
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} else
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MO.setIsDead(true);
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}
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}
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31
test/CodeGen/X86/local-liveness.ll
Normal file
31
test/CodeGen/X86/local-liveness.ll
Normal file
@ -0,0 +1,31 @@
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; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | grep {subl %eax, %esi}
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; Local regalloc shouldn't assume that both the uses of the
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; sub instruction are kills, because one of them is tied
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; to an output. Previously, it was allocating both inputs
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; in the same register.
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define i32 @func_3() nounwind {
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entry:
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%retval = alloca i32 ; <i32*> [#uses=2]
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%g_323 = alloca i8 ; <i8*> [#uses=2]
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%p_5 = alloca i64, align 8 ; <i64*> [#uses=2]
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%0 = alloca i32 ; <i32*> [#uses=2]
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%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
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store i64 0, i64* %p_5, align 8
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store i8 1, i8* %g_323, align 1
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%1 = load i8* %g_323, align 1 ; <i8> [#uses=1]
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%2 = sext i8 %1 to i64 ; <i64> [#uses=1]
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%3 = load i64* %p_5, align 8 ; <i64> [#uses=1]
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%4 = sub i64 %3, %2 ; <i64> [#uses=1]
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%5 = icmp sge i64 %4, 0 ; <i1> [#uses=1]
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%6 = zext i1 %5 to i32 ; <i32> [#uses=1]
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store i32 %6, i32* %0, align 4
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%7 = load i32* %0, align 4 ; <i32> [#uses=1]
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store i32 %7, i32* %retval, align 4
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br label %return
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return: ; preds = %entry
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%retval1 = load i32* %retval ; <i32> [#uses=1]
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ret i32 %retval1
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}
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