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Adjust grep's for new code sequence.
llvm-svn: 55320
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@ -1,5 +1,5 @@
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; RUN: llvm-as < %s | llc -march=ppc32 | grep lwarx | count 3
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; RUN: llvm-as < %s | llc -march=ppc32 | grep stwcx. | count 3
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; RUN: llvm-as < %s | llc -march=ppc32 | grep stwcx. | count 4
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define i32 @exchange_and_add(i32* %mem, i32 %val) nounwind {
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%tmp = call i32 @llvm.atomic.load.add.i32( i32* %mem, i32 %val )
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@ -1,5 +1,5 @@
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; RUN: llvm-as < %s | llc -march=ppc64 | grep ldarx | count 3
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; RUN: llvm-as < %s | llc -march=ppc64 | grep stdcx. | count 3
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; RUN: llvm-as < %s | llc -march=ppc64 | grep stdcx. | count 4
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define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind {
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%tmp = call i64 @llvm.atomic.load.add.i64( i64* %mem, i64 %val )
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