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Don't assign new registers created during a split to the same stack slot, but
give them individual stack slots once the are actually spilled. llvm-svn: 117945
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b4a55702b7
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@ -369,12 +369,12 @@ void InlineSpiller::spill(LiveRangeEdit &edit) {
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return;
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rc_ = mri_.getRegClass(edit.getReg());
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stackSlot_ = edit.assignStackSlot(vrm_);
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stackSlot_ = vrm_.assignVirt2StackSlot(edit_->getReg());
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// Update LiveStacks now that we are committed to spilling.
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LiveInterval &stacklvr = lss_.getOrCreateInterval(stackSlot_, rc_);
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if (!stacklvr.hasAtLeastOneValue())
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stacklvr.getNextValue(SlotIndex(), 0, lss_.getVNInfoAllocator());
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assert(stacklvr.empty() && "Just created stack slot not empty");
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stacklvr.getNextValue(SlotIndex(), 0, lss_.getVNInfoAllocator());
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stacklvr.MergeRangesInAsValue(edit_->getParent(), stacklvr.getValNumInfo(0));
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// Iterate over instructions using register.
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@ -19,21 +19,12 @@
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using namespace llvm;
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int LiveRangeEdit::assignStackSlot(VirtRegMap &vrm) {
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int ss = vrm.getStackSlot(getReg());
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if (ss != VirtRegMap::NO_STACK_SLOT)
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return ss;
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return vrm.assignVirt2StackSlot(getReg());
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}
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LiveInterval &LiveRangeEdit::create(MachineRegisterInfo &mri,
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LiveIntervals &lis,
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VirtRegMap &vrm) {
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const TargetRegisterClass *RC = mri.getRegClass(parent_.reg);
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unsigned VReg = mri.createVirtualRegister(RC);
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vrm.grow();
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// Immediately assign to the same stack slot as parent.
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vrm.assignVirt2StackSlot(VReg, assignStackSlot(vrm));
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LiveInterval &li = lis.getOrCreateInterval(VReg);
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newRegs_.push_back(&li);
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return li;
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@ -80,10 +80,6 @@ public:
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unsigned size() const { return newRegs_.size()-firstNew_; }
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LiveInterval *get(unsigned idx) const { return newRegs_[idx+firstNew_]; }
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/// assignStackSlot - Ensure a stack slot is assigned to parent.
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/// @return the assigned stack slot number.
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int assignStackSlot(VirtRegMap&);
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/// create - Create a new register with the same class and stack slot as
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/// parent.
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LiveInterval &create(MachineRegisterInfo&, LiveIntervals&, VirtRegMap&);
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