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[InstCombine] convert bitcast-shuffle to vector trunc
As discussed in D76983, that patch can turn a chain of insert/extract with scalar trunc ops into bitcast+extract and existing instcombine vector transforms end up creating a shuffle out of that (see the PhaseOrdering test for an example). Currently, that process requires at least this sequence: -instcombine -early-cse -instcombine. Before D76983, the sequence of insert/extract would reach the SLP vectorizer and become a vector trunc there. Based on a small sampling of public targets/types, converting the shuffle to a trunc is better for codegen in most cases (and a regression of that form is the reason this was noticed). The trunc is clearly better for IR-level analysis as well. This means that we can induce "spontaneous vectorization" without invoking any explicit vectorizer passes (at least a vector cast op may be created out of scalar casts), but that seems to be the right choice given that we started with a chain of insert/extract, and the backend would expand back to that chain if a target does not support the op. Differential Revision: https://reviews.llvm.org/D77299
This commit is contained in:
Sanjay Patel
parent
27d5de4f6b
commit
6660b7b194
@ -1657,6 +1657,47 @@ static Instruction *foldSelectShuffle(ShuffleVectorInst &Shuf,
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return NewBO;
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}
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/// Convert a narrowing shuffle of a bitcasted vector into a vector truncate.
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/// Example (little endian):
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/// shuf (bitcast <4 x i16> X to <8 x i8>), <0, 2, 4, 6> --> trunc X to <4 x i8>
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static Instruction *foldTruncShuffle(ShuffleVectorInst &Shuf,
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bool IsBigEndian) {
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// This must be a bitcasted shuffle of 1 vector integer operand.
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Type *DestType = Shuf.getType();
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Value *X;
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if (!match(Shuf.getOperand(0), m_BitCast(m_Value(X))) ||
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!match(Shuf.getOperand(1), m_Undef()) || !DestType->isIntOrIntVectorTy())
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return nullptr;
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// The source type must have the same number of elements as the shuffle,
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// and the source element type must be larger than the shuffle element type.
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Type *SrcType = X->getType();
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if (!SrcType->isVectorTy() || !SrcType->isIntOrIntVectorTy() ||
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SrcType->getVectorNumElements() != DestType->getVectorNumElements() ||
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SrcType->getScalarSizeInBits() % DestType->getScalarSizeInBits() != 0)
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return nullptr;
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assert(Shuf.changesLength() && !Shuf.increasesLength() &&
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"Expected a shuffle that decreases length");
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// Last, check that the mask chooses the correct low bits for each narrow
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// element in the result.
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uint64_t TruncRatio =
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SrcType->getScalarSizeInBits() / DestType->getScalarSizeInBits();
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ArrayRef<int> Mask = Shuf.getShuffleMask();
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for (unsigned i = 0, e = Mask.size(); i != e; ++i) {
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if (Mask[i] == UndefMaskElem)
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continue;
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uint64_t LSBIndex = IsBigEndian ? (i + 1) * TruncRatio - 1 : i * TruncRatio;
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assert(LSBIndex <= std::numeric_limits<int32_t>::max() &&
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"Overflowed 32-bits");
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if (Mask[i] != (int)LSBIndex)
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return nullptr;
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}
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return new TruncInst(X, DestType);
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}
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/// Match a shuffle-select-shuffle pattern where the shuffles are widening and
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/// narrowing (concatenating with undef and extracting back to the original
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/// length). This allows replacing the wide select with a narrow select.
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@ -1951,6 +1992,9 @@ Instruction *InstCombiner::visitShuffleVectorInst(ShuffleVectorInst &SVI) {
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if (Instruction *I = foldSelectShuffle(SVI, Builder, DL))
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return I;
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if (Instruction *I = foldTruncShuffle(SVI, DL.isBigEndian()))
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return I;
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if (Instruction *I = narrowVectorSelect(SVI, Builder))
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return I;
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@ -3,10 +3,14 @@
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; RUN: opt < %s -instcombine -S -data-layout="E" | FileCheck %s --check-prefixes=ANY,BE
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define <4 x i16> @trunc_little_endian(<4 x i32> %x) {
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; ANY-LABEL: @trunc_little_endian(
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; ANY-NEXT: [[B:%.*]] = bitcast <4 x i32> [[X:%.*]] to <8 x i16>
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; ANY-NEXT: [[R:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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; ANY-NEXT: ret <4 x i16> [[R]]
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; LE-LABEL: @trunc_little_endian(
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; LE-NEXT: [[R:%.*]] = trunc <4 x i32> [[X:%.*]] to <4 x i16>
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; LE-NEXT: ret <4 x i16> [[R]]
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;
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; BE-LABEL: @trunc_little_endian(
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; BE-NEXT: [[B:%.*]] = bitcast <4 x i32> [[X:%.*]] to <8 x i16>
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; BE-NEXT: [[R:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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; BE-NEXT: ret <4 x i16> [[R]]
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;
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%b = bitcast <4 x i32> %x to <8 x i16>
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%r = shufflevector <8 x i16> %b, <8 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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@ -14,10 +18,14 @@ define <4 x i16> @trunc_little_endian(<4 x i32> %x) {
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}
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define <4 x i16> @trunc_big_endian(<4 x i32> %x) {
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; ANY-LABEL: @trunc_big_endian(
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; ANY-NEXT: [[B:%.*]] = bitcast <4 x i32> [[X:%.*]] to <8 x i16>
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; ANY-NEXT: [[R:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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; ANY-NEXT: ret <4 x i16> [[R]]
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; LE-LABEL: @trunc_big_endian(
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; LE-NEXT: [[B:%.*]] = bitcast <4 x i32> [[X:%.*]] to <8 x i16>
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; LE-NEXT: [[R:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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; LE-NEXT: ret <4 x i16> [[R]]
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;
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; BE-LABEL: @trunc_big_endian(
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; BE-NEXT: [[R:%.*]] = trunc <4 x i32> [[X:%.*]] to <4 x i16>
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; BE-NEXT: ret <4 x i16> [[R]]
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;
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%b = bitcast <4 x i32> %x to <8 x i16>
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%r = shufflevector <8 x i16> %b, <8 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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@ -26,12 +34,20 @@ define <4 x i16> @trunc_big_endian(<4 x i32> %x) {
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declare void @use_v8i16(<8 x i16>)
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; Extra use is ok.
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define <2 x i16> @trunc_little_endian_extra_use(<2 x i64> %x) {
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; ANY-LABEL: @trunc_little_endian_extra_use(
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; ANY-NEXT: [[B:%.*]] = bitcast <2 x i64> [[X:%.*]] to <8 x i16>
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; ANY-NEXT: call void @use_v8i16(<8 x i16> [[B]])
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; ANY-NEXT: [[R:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> undef, <2 x i32> <i32 0, i32 4>
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; ANY-NEXT: ret <2 x i16> [[R]]
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; LE-LABEL: @trunc_little_endian_extra_use(
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; LE-NEXT: [[B:%.*]] = bitcast <2 x i64> [[X:%.*]] to <8 x i16>
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; LE-NEXT: call void @use_v8i16(<8 x i16> [[B]])
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; LE-NEXT: [[R:%.*]] = trunc <2 x i64> [[X]] to <2 x i16>
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; LE-NEXT: ret <2 x i16> [[R]]
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;
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; BE-LABEL: @trunc_little_endian_extra_use(
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; BE-NEXT: [[B:%.*]] = bitcast <2 x i64> [[X:%.*]] to <8 x i16>
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; BE-NEXT: call void @use_v8i16(<8 x i16> [[B]])
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; BE-NEXT: [[R:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> undef, <2 x i32> <i32 0, i32 4>
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; BE-NEXT: ret <2 x i16> [[R]]
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;
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%b = bitcast <2 x i64> %x to <8 x i16>
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call void @use_v8i16(<8 x i16> %b)
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@ -41,12 +57,20 @@ define <2 x i16> @trunc_little_endian_extra_use(<2 x i64> %x) {
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declare void @use_v12i11(<12 x i11>)
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; Weird types are ok.
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define <4 x i11> @trunc_big_endian_extra_use(<4 x i33> %x) {
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; ANY-LABEL: @trunc_big_endian_extra_use(
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; ANY-NEXT: [[B:%.*]] = bitcast <4 x i33> [[X:%.*]] to <12 x i11>
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; ANY-NEXT: call void @use_v12i11(<12 x i11> [[B]])
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; ANY-NEXT: [[R:%.*]] = shufflevector <12 x i11> [[B]], <12 x i11> undef, <4 x i32> <i32 2, i32 5, i32 8, i32 11>
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; ANY-NEXT: ret <4 x i11> [[R]]
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; LE-LABEL: @trunc_big_endian_extra_use(
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; LE-NEXT: [[B:%.*]] = bitcast <4 x i33> [[X:%.*]] to <12 x i11>
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; LE-NEXT: call void @use_v12i11(<12 x i11> [[B]])
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; LE-NEXT: [[R:%.*]] = shufflevector <12 x i11> [[B]], <12 x i11> undef, <4 x i32> <i32 2, i32 5, i32 8, i32 11>
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; LE-NEXT: ret <4 x i11> [[R]]
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;
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; BE-LABEL: @trunc_big_endian_extra_use(
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; BE-NEXT: [[B:%.*]] = bitcast <4 x i33> [[X:%.*]] to <12 x i11>
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; BE-NEXT: call void @use_v12i11(<12 x i11> [[B]])
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; BE-NEXT: [[R:%.*]] = trunc <4 x i33> [[X]] to <4 x i11>
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; BE-NEXT: ret <4 x i11> [[R]]
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;
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%b = bitcast <4 x i33> %x to <12 x i11>
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call void @use_v12i11(<12 x i11> %b)
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@ -54,3 +78,46 @@ define <4 x i11> @trunc_big_endian_extra_use(<4 x i33> %x) {
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ret <4 x i11> %r
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}
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define <4 x i16> @wrong_cast1(i128 %x) {
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; ANY-LABEL: @wrong_cast1(
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; ANY-NEXT: [[B:%.*]] = bitcast i128 [[X:%.*]] to <8 x i16>
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; ANY-NEXT: [[R:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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; ANY-NEXT: ret <4 x i16> [[R]]
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;
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%b = bitcast i128 %x to <8 x i16>
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%r = shufflevector <8 x i16> %b, <8 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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ret <4 x i16> %r
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}
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define <4 x i16> @wrong_cast2(<4 x float> %x) {
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; ANY-LABEL: @wrong_cast2(
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; ANY-NEXT: [[B:%.*]] = bitcast <4 x float> [[X:%.*]] to <8 x i16>
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; ANY-NEXT: [[R:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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; ANY-NEXT: ret <4 x i16> [[R]]
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;
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%b = bitcast <4 x float> %x to <8 x i16>
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%r = shufflevector <8 x i16> %b, <8 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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ret <4 x i16> %r
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}
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define <4 x half> @wrong_cast3(<4 x i32> %x) {
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; ANY-LABEL: @wrong_cast3(
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; ANY-NEXT: [[B:%.*]] = bitcast <4 x i32> [[X:%.*]] to <8 x half>
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; ANY-NEXT: [[R:%.*]] = shufflevector <8 x half> [[B]], <8 x half> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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; ANY-NEXT: ret <4 x half> [[R]]
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;
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%b = bitcast <4 x i32> %x to <8 x half>
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%r = shufflevector <8 x half> %b, <8 x half> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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ret <4 x half> %r
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}
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define <2 x i16> @wrong_shuffle(<4 x i32> %x) {
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; ANY-LABEL: @wrong_shuffle(
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; ANY-NEXT: [[B:%.*]] = bitcast <4 x i32> [[X:%.*]] to <8 x i16>
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; ANY-NEXT: [[R:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> undef, <2 x i32> <i32 0, i32 2>
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; ANY-NEXT: ret <2 x i16> [[R]]
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;
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%b = bitcast <4 x i32> %x to <8 x i16>
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%r = shufflevector <8 x i16> %b, <8 x i16> undef, <2 x i32> <i32 0, i32 2>
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ret <2 x i16> %r
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}
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@ -4,8 +4,7 @@
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define <4 x i16> @truncate(<4 x i32> %x) {
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; ANY-LABEL: @truncate(
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; ANY-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[X:%.*]] to <8 x i16>
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; ANY-NEXT: [[V3:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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; ANY-NEXT: [[V3:%.*]] = trunc <4 x i32> [[X:%.*]] to <4 x i16>
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; ANY-NEXT: ret <4 x i16> [[V3]]
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;
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%x0 = extractelement <4 x i32> %x, i32 0
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