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move the "movsd -> movsl" alias to the .td files,

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tidy up the movsx and movzx aliases.

llvm-svn: 118331
This commit is contained in:
Chris Lattner 2010-11-06 07:34:58 +00:00
parent ec0ef3385d
commit 66c868f386
2 changed files with 17 additions and 36 deletions
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6
lib/Target/X86/AsmParser/X86AsmParser.cpp
View File

@ -969,12 +969,6 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
NameLoc);
}
// movsd -> movsl (when no operands are specified).
if (Name == "movsd" && Operands.size() == 1) {
delete Operands[0];
Operands[0] = X86Operand::CreateToken("movsl", NameLoc);
}
// fstp <mem> -> fstps <mem>. Without this, we'll default to fstpl due to
// suffix searching.
if (Name == "fstp" && Operands.size() == 2 &&

47
lib/Target/X86/X86InstrInfo.td
View File

@ -1370,6 +1370,10 @@ defm : IntegerCondCodeMnemonicAlias<"cmov", "q">;
// Assembler Instruction Aliases
//===----------------------------------------------------------------------===//
// movsd with no operands (as opposed to the SSE scalar move of a double) is an
// alias for movsl. (as in rep; movsd)
def : InstAlias<"movsd", (MOVSD)>;
// clr aliases.
def : InstAlias<"clrb $reg", (XOR8rr GR8 :$reg, GR8 :$reg)>;
def : InstAlias<"clrw $reg", (XOR16rr GR16:$reg, GR16:$reg)>;
@ -1377,38 +1381,21 @@ def : InstAlias<"clrl $reg", (XOR32rr GR32:$reg, GR32:$reg)>;
def : InstAlias<"clrq $reg", (XOR64rr GR64:$reg, GR64:$reg)>;
// movsx aliases
def : InstAlias<"movsx $src, $dst",
(MOVSX16rr8W GR16:$dst, GR8:$src)>;
def : InstAlias<"movsx $src, $dst",
(MOVSX16rm8W GR16:$dst, i8mem:$src)>;
def : InstAlias<"movsx $src, $dst",
(MOVSX32rr8 GR32:$dst, GR8:$src)>;
def : InstAlias<"movsx $src, $dst",
(MOVSX32rr16 GR32:$dst, GR16:$src)>;
def : InstAlias<"movsx $src, $dst",
(MOVSX64rr8 GR64:$dst, GR8:$src)>;
def : InstAlias<"movsx $src, $dst",
(MOVSX64rr16 GR64:$dst, GR16:$src)>;
def : InstAlias<"movsx $src, $dst",
(MOVSX64rr32 GR64:$dst, GR32:$src)>;
def : InstAlias<"movsx $src, $dst", (MOVSX16rr8W GR16:$dst, GR8:$src)>;
def : InstAlias<"movsx $src, $dst", (MOVSX16rm8W GR16:$dst, i8mem:$src)>;
def : InstAlias<"movsx $src, $dst", (MOVSX32rr8 GR32:$dst, GR8:$src)>;
def : InstAlias<"movsx $src, $dst", (MOVSX32rr16 GR32:$dst, GR16:$src)>;
def : InstAlias<"movsx $src, $dst", (MOVSX64rr8 GR64:$dst, GR8:$src)>;
def : InstAlias<"movsx $src, $dst", (MOVSX64rr16 GR64:$dst, GR16:$src)>;
def : InstAlias<"movsx $src, $dst", (MOVSX64rr32 GR64:$dst, GR32:$src)>;
// movzx aliases
def : InstAlias<"movzx $src, $dst",
(MOVZX16rr8W GR16:$dst, GR8:$src)>;
def : InstAlias<"movzx $src, $dst",
(MOVZX16rm8W GR16:$dst, i8mem:$src)>;
def : InstAlias<"movzx $src, $dst",
(MOVZX32rr8 GR32:$dst, GR8:$src)>;
def : InstAlias<"movzx $src, $dst",
(MOVZX32rr16 GR32:$dst, GR16:$src)>;
def : InstAlias<"movzx $src, $dst",
(MOVZX64rr8_Q GR64:$dst, GR8:$src)>;
def : InstAlias<"movzx $src, $dst",
(MOVZX64rr16_Q GR64:$dst, GR16:$src)>;
def : InstAlias<"movzx $src, $dst", (MOVZX16rr8W GR16:$dst, GR8:$src)>;
def : InstAlias<"movzx $src, $dst", (MOVZX16rm8W GR16:$dst, i8mem:$src)>;
def : InstAlias<"movzx $src, $dst", (MOVZX32rr8 GR32:$dst, GR8:$src)>;
def : InstAlias<"movzx $src, $dst", (MOVZX32rr16 GR32:$dst, GR16:$src)>;
def : InstAlias<"movzx $src, $dst", (MOVZX64rr8_Q GR64:$dst, GR8:$src)>;
def : InstAlias<"movzx $src, $dst", (MOVZX64rr16_Q GR64:$dst, GR16:$src)>;
// Note: No GR32->GR64 movzx form.