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This method belonged in VirtRegMap.
llvm-svn: 126002
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parent
6d746aa534
commit
69bc9ac5f7
@ -19,18 +19,13 @@
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using namespace llvm;
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unsigned LiveRangeEdit::getOriginal(const VirtRegMap &vrm) const {
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unsigned Orig = vrm.getPreSplitReg(getReg());
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return Orig ? Orig : getReg();
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}
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LiveInterval &LiveRangeEdit::create(MachineRegisterInfo &mri,
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LiveIntervals &lis,
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VirtRegMap &vrm) {
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const TargetRegisterClass *RC = mri.getRegClass(getReg());
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unsigned VReg = mri.createVirtualRegister(RC);
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vrm.grow();
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vrm.setIsSplitFromReg(VReg, getOriginal(vrm));
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vrm.setIsSplitFromReg(VReg, vrm.getOriginal(getReg()));
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LiveInterval &li = lis.getOrCreateInterval(VReg);
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newRegs_.push_back(&li);
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return li;
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@ -73,10 +73,6 @@ public:
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LiveInterval &getParent() const { return parent_; }
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unsigned getReg() const { return parent_.reg; }
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/// getOriginal - Return the original virtual register that parent descends
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/// from through splitting. The original was not created by splitting.
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unsigned getOriginal(const VirtRegMap&) const;
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/// Iterator for accessing the new registers added by this edit.
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typedef SmallVectorImpl<LiveInterval*>::const_iterator iterator;
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iterator begin() const { return newRegs_.begin()+firstNew_; }
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@ -218,6 +218,15 @@ namespace llvm {
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return Virt2SplitMap[virtReg];
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}
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/// getOriginal - Return the original virtual register that VirtReg descends
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/// from through splitting.
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/// A register that was not created by splitting is its own original.
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/// This operation is idempotent.
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unsigned getOriginal(unsigned VirtReg) const {
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unsigned Orig = getPreSplitReg(VirtReg);
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return Orig ? Orig : VirtReg;
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}
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/// @brief returns true if the specified virtual register is not
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/// mapped to a stack slot or rematerialized.
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bool isAssignedReg(unsigned virtReg) const {
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