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[mips] Fix decoding of microMIPS JALX instruction

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microMIPS jump and link exchange instruction stores a target in a
26-bits field. Despite other microMIPS JAL instructions these bits
are target address shifted right 2 bits [1]. The patch fixes the
JALX instruction decoding and uses 2-bit shift.

[1] MIPS Architecture for Programmers Volume II-B: The microMIPS32 Instruction Set

Differential Revision: https://reviews.llvm.org/D67320

llvm-svn: 371428
This commit is contained in:
Simon Atanasyan 2019-09-09 17:28:45 +00:00
parent 0e6cc0ae15
commit 6b3c6fa9dc
4 changed files with 23 additions and 4 deletions
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16
lib/Target/Mips/Disassembler/MipsDisassembler.cpp
View File

@ -267,6 +267,13 @@ static DecodeStatus DecodeJumpTargetMM(MCInst &Inst,
uint64_t Address,
const void *Decoder);
// DecodeJumpTargetXMM - Decode microMIPS jump and link exchange target,
// which is shifted left by 2 bit.
static DecodeStatus DecodeJumpTargetXMM(MCInst &Inst,
unsigned Insn,
uint64_t Address,
const void *Decoder);
static DecodeStatus DecodeMem(MCInst &Inst,
unsigned Insn,
uint64_t Address,
@ -2291,6 +2298,15 @@ static DecodeStatus DecodeJumpTargetMM(MCInst &Inst,
return MCDisassembler::Success;
}
static DecodeStatus DecodeJumpTargetXMM(MCInst &Inst,
unsigned Insn,
uint64_t Address,
const void *Decoder) {
unsigned JumpOffset = fieldFromInstruction(Insn, 0, 26) << 2;
Inst.addOperand(MCOperand::createImm(JumpOffset));
return MCDisassembler::Success;
}
static DecodeStatus DecodeAddiur2Simm7(MCInst &Inst,
unsigned Value,
uint64_t Address,

9
lib/Target/Mips/MicroMipsInstrInfo.td
View File

@ -955,17 +955,18 @@ let DecoderNamespace = "MicroMips" in {
EXT_FM_MM<0x0c>, ISA_MICROMIPS32_NOT_MIPS32R6;
/// Jump Instructions
let DecoderMethod = "DecodeJumpTargetMM" in
let DecoderMethod = "DecodeJumpTargetMM" in {
def J_MM : MMRel, JumpFJ<jmptarget_mm, "j", br, bb, "j">,
J_FM_MM<0x35>, AdditionalRequires<[RelocNotPIC]>,
IsBranch, ISA_MICROMIPS32_NOT_MIPS32R6;
let DecoderMethod = "DecodeJumpTargetMM" in {
def JAL_MM : MMRel, JumpLink<"jal", calltarget_mm>, J_FM_MM<0x3d>,
ISA_MICROMIPS32_NOT_MIPS32R6;
}
let DecoderMethod = "DecodeJumpTargetXMM" in
def JALX_MM : MMRel, JumpLink<"jalx", calltarget>, J_FM_MM<0x3c>,
ISA_MICROMIPS32_NOT_MIPS32R6;
}
def JR_MM : MMRel, IndirectBranch<"jr", GPR32Opnd>, JR_FM_MM<0x3c>,
ISA_MICROMIPS32_NOT_MIPS32R6;
def JALR_MM : JumpLinkReg<"jalr", GPR32Opnd>, JALR_FM_MM<0x03c>,

1
test/MC/Disassembler/Mips/micromips32r3/valid-el.txt
View File

@ -137,6 +137,7 @@
0x00 0xd4 0x98 0x02 # CHECK: j 1328
0x00 0xf4 0x98 0x02 # CHECK: jal 1328
0xe6 0x03 0x3c 0x0f # CHECK: jalr $ra, $6
0x10 0xf0 0x34 0x00 # CHECK: jalx 4194512
0x07 0x00 0x3c 0x0f # CHECK: jr $7
0xc9 0x94 0x9a 0x02 # CHECK: beq $9, $6, 1336
0x46 0x40 0x9a 0x02 # CHECK: bgez $6, 1336

1
test/MC/Disassembler/Mips/micromips32r3/valid.txt
View File

@ -137,6 +137,7 @@
0xd4 0x00 0x02 0x98 # CHECK: j 1328
0xf4 0x00 0x02 0x98 # CHECK: jal 1328
0x03 0xe6 0x0f 0x3c # CHECK: jalr $ra, $6
0xf0 0x10 0x00 0x34 # CHECK: jalx 4194512
0x00 0x07 0x0f 0x3c # CHECK: jr $7
0x94 0xc9 0x02 0x9a # CHECK: beq $9, $6, 1336
0x40 0x46 0x02 0x9a # CHECK: bgez $6, 1336