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Added LDRT/LDRBT/STRT/STRBT for disassembly only.
llvm-svn: 95916
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@ -948,6 +948,20 @@ def LDRSB_POST: AI3ldsbpo<(outs GPR:$dst, GPR:$base_wb),
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"ldrsb", "\t$dst, [$base], $offset", "$base = $base_wb", []>;
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}
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// LDRT and LDRBT are for disassembly only.
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def LDRT : AI2ldwpo<(outs GPR:$dst, GPR:$base_wb),
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(ins GPR:$base, am2offset:$offset), LdFrm, IIC_iLoadru,
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"ldrt", "\t$dst, [$base], $offset", "$base = $base_wb", []> {
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let Inst{21} = 1; // overwrite
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}
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def LDRBT : AI2ldbpo<(outs GPR:$dst, GPR:$base_wb),
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(ins GPR:$base,am2offset:$offset), LdFrm, IIC_iLoadru,
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"ldrb", "\t$dst, [$base], $offset", "$base = $base_wb", []> {
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let Inst{21} = 1; // overwrite
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}
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// Store
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def STR : AI2stw<(outs), (ins GPR:$src, addrmode2:$addr), StFrm, IIC_iStorer,
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"str", "\t$src, $addr",
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@ -1011,6 +1025,24 @@ def STRB_POST: AI2stbpo<(outs GPR:$base_wb),
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[(set GPR:$base_wb, (post_truncsti8 GPR:$src,
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GPR:$base, am2offset:$offset))]>;
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// STRT and STRBT are for disassembly only.
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def STRT : AI2stwpo<(outs GPR:$base_wb),
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(ins GPR:$src, GPR:$base,am2offset:$offset),
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StFrm, IIC_iStoreru,
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"strt", "\t$src, [$base], $offset", "$base = $base_wb",
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[/* For disassembly only; pattern left blank */]> {
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let Inst{21} = 1; // overwrite
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}
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def STRBT : AI2stbpo<(outs GPR:$base_wb),
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(ins GPR:$src, GPR:$base,am2offset:$offset),
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StFrm, IIC_iStoreru,
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"strbt", "\t$src, [$base], $offset", "$base = $base_wb",
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[/* For disassembly only; pattern left blank */]> {
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let Inst{21} = 1; // overwrite
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}
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//===----------------------------------------------------------------------===//
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// Load / store multiple Instructions.
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//
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