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[Hexagon] Handle more types of immediate operands in expand-condsets
llvm-svn: 305943
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a033cc7429
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6b8f89e421
@ -567,8 +567,19 @@ unsigned HexagonExpandCondsets::getCondTfrOpcode(const MachineOperand &SO,
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}
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llvm_unreachable("Invalid register operand");
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}
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if (SO.isImm() || SO.isFPImm())
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return IfTrue ? C2_cmoveit : C2_cmoveif;
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switch (SO.getType()) {
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case MachineOperand::MO_Immediate:
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case MachineOperand::MO_FPImmediate:
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case MachineOperand::MO_ConstantPoolIndex:
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case MachineOperand::MO_TargetIndex:
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case MachineOperand::MO_JumpTableIndex:
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case MachineOperand::MO_ExternalSymbol:
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case MachineOperand::MO_GlobalAddress:
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case MachineOperand::MO_BlockAddress:
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return IfTrue ? C2_cmoveit : C2_cmoveif;
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default:
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break;
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}
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llvm_unreachable("Unexpected source operand");
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}
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22
test/CodeGen/Hexagon/expand-condsets-imm.mir
Normal file
22
test/CodeGen/Hexagon/expand-condsets-imm.mir
Normal file
@ -0,0 +1,22 @@
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# RUN: llc -march=hexagon -run-pass expand-condsets %s -o - | FileCheck %s
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# Check that we can expand a mux with a global as an immediate operand.
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# CHECK: C2_cmoveif undef %0, @G
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--- |
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@G = global i32 0, align 4
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define void @fred() { ret void }
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...
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---
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name: fred
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tracksRegLiveness: true
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registers:
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- { id: 0, class: predregs }
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- { id: 1, class: intregs }
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body: |
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bb.1:
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%1 = IMPLICIT_DEF
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%1 = C2_muxir undef %0, %1, @G
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%r0 = COPY %1
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...
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