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AMDGPU: Split test function

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This avoids slightly different scheduling/regalloc behavior, and
avoids a test diff between GlobalISel and SelectionDAG.
This commit is contained in:
Matt Arsenault 2020-01-12 18:08:41 -05:00 committed by Matt Arsenault
parent bab10482dd
commit 6c67abdba0
1 changed files with 16 additions and 4 deletions
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20
test/CodeGen/AMDGPU/write_register.ll
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@ -24,13 +24,25 @@ define amdgpu_kernel void @test_write_exec(i64 %val) #0 {
ret void
}
; CHECK-LABEL: {{^}}test_write_flat_scratch:
; CHECK-LABEL: {{^}}test_write_flat_scratch_0:
; CHECK: s_mov_b64 flat_scratch, 0
; CHECK: s_mov_b64 flat_scratch, -1
; CHECK: s_mov_b64 flat_scratch, s{{\[[0-9]+:[0-9]+\]}}
define amdgpu_kernel void @test_write_flat_scratch(i64 %val) #0 {
define amdgpu_kernel void @test_write_flat_scratch_0(i64 %val) #0 {
call void @llvm.write_register.i64(metadata !2, i64 0)
call void @llvm.amdgcn.wave.barrier() #1
ret void
}
; CHECK-LABEL: {{^}}test_write_flat_scratch_neg1:
; CHECK: s_mov_b64 flat_scratch, -1
define amdgpu_kernel void @test_write_flat_scratch_neg1(i64 %val) #0 {
call void @llvm.write_register.i64(metadata !2, i64 -1)
call void @llvm.amdgcn.wave.barrier() #1
ret void
}
; CHECK-LABEL: {{^}}test_write_flat_scratch_val:
; CHECK: s_load_dwordx2 flat_scratch, s{{\[[0-9]+:[0-9]+\]}}
define amdgpu_kernel void @test_write_flat_scratch_val(i64 %val) #0 {
call void @llvm.write_register.i64(metadata !2, i64 %val)
call void @llvm.amdgcn.wave.barrier() #1
ret void