RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-03-07 11:59:09 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[PowerPC][NFC] Move peephole optimization of RLDICR into a method.

Browse Source 
llvm-svn: 364372
This commit is contained in:
Kai Luo 2019-06-26 01:34:37 +00:00
parent 798f464098
commit 6d0b76e760
1 changed files with 57 additions and 47 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

104
lib/Target/PowerPC/PPCMIPeephole.cpp
View File

@ -94,6 +94,7 @@ private:
// Perform peepholes.
bool eliminateRedundantCompare(void);
bool eliminateRedundantTOCSaves(std::map<MachineInstr *, bool> &TOCSaves);
void emitRLDICWhenLoweringJumpTables(MachineInstr &MI);
void UpdateTOCSaves(std::map<MachineInstr *, bool> &TOCSaves,
MachineInstr *MI);
@ -760,53 +761,7 @@ bool PPCMIPeephole::simplifyCode(void) {
break;
}
case PPC::RLDICR: {
// We miss the opportunity to emit an RLDIC when lowering jump tables
// since ISEL sees only a single basic block. When selecting, the clear
// and shift left will be in different blocks.
unsigned SrcReg = MI.getOperand(1).getReg();
if (!TargetRegisterInfo::isVirtualRegister(SrcReg))
break;
MachineInstr *SrcMI = MRI->getVRegDef(SrcReg);
if (SrcMI->getOpcode() != PPC::RLDICL)
break;
MachineOperand MOpSHSrc = SrcMI->getOperand(2);
MachineOperand MOpMBSrc = SrcMI->getOperand(3);
MachineOperand MOpSHMI = MI.getOperand(2);
MachineOperand MOpMEMI = MI.getOperand(3);
if (!(MOpSHSrc.isImm() && MOpMBSrc.isImm() &&
MOpSHMI.isImm() && MOpMEMI.isImm()))
break;
uint64_t SHSrc = MOpSHSrc.getImm();
uint64_t MBSrc = MOpMBSrc.getImm();
uint64_t SHMI = MOpSHMI.getImm();
uint64_t MEMI = MOpMEMI.getImm();
uint64_t NewSH = SHSrc + SHMI;
uint64_t NewMB = MBSrc - SHMI;
if (NewMB > 63 || NewSH > 63)
break;
// The bits cleared with RLDICL are [0, MBSrc).
// The bits cleared with RLDICR are (MEMI, 63].
// After the sequence, the bits cleared are:
// [0, MBSrc-SHMI) and (MEMI, 63).
//
// The bits cleared with RLDIC are [0, NewMB) and (63-NewSH, 63].
if ((63 - NewSH) != MEMI)
break;
LLVM_DEBUG(dbgs() << "Converting pair: ");
LLVM_DEBUG(SrcMI->dump());
LLVM_DEBUG(MI.dump());
MI.setDesc(TII->get(PPC::RLDIC));
MI.getOperand(1).setReg(SrcMI->getOperand(1).getReg());
MI.getOperand(2).setImm(NewSH);
MI.getOperand(3).setImm(NewMB);
LLVM_DEBUG(dbgs() << "To: ");
LLVM_DEBUG(MI.dump());
NumRotatesCollapsed++;
emitRLDICWhenLoweringJumpTables(MI);
break;
}
}
@ -1326,6 +1281,61 @@ bool PPCMIPeephole::eliminateRedundantCompare(void) {
return Simplified;
}
// We miss the opportunity to emit an RLDIC when lowering jump tables
// since ISEL sees only a single basic block. When selecting, the clear
// and shift left will be in different blocks.
void PPCMIPeephole::emitRLDICWhenLoweringJumpTables(MachineInstr &MI) {
if (MI.getOpcode() != PPC::RLDICR)
return;
unsigned SrcReg = MI.getOperand(1).getReg();
if (!TargetRegisterInfo::isVirtualRegister(SrcReg))
return;
MachineInstr *SrcMI = MRI->getVRegDef(SrcReg);
if (SrcMI->getOpcode() != PPC::RLDICL)
return;
MachineOperand MOpSHSrc = SrcMI->getOperand(2);
MachineOperand MOpMBSrc = SrcMI->getOperand(3);
MachineOperand MOpSHMI = MI.getOperand(2);
MachineOperand MOpMEMI = MI.getOperand(3);
if (!(MOpSHSrc.isImm() && MOpMBSrc.isImm() && MOpSHMI.isImm() &&
MOpMEMI.isImm()))
return;
uint64_t SHSrc = MOpSHSrc.getImm();
uint64_t MBSrc = MOpMBSrc.getImm();
uint64_t SHMI = MOpSHMI.getImm();
uint64_t MEMI = MOpMEMI.getImm();
uint64_t NewSH = SHSrc + SHMI;
uint64_t NewMB = MBSrc - SHMI;
if (NewMB > 63 || NewSH > 63)
return;
// The bits cleared with RLDICL are [0, MBSrc).
// The bits cleared with RLDICR are (MEMI, 63].
// After the sequence, the bits cleared are:
// [0, MBSrc-SHMI) and (MEMI, 63).
//
// The bits cleared with RLDIC are [0, NewMB) and (63-NewSH, 63].
if ((63 - NewSH) != MEMI)
return;
LLVM_DEBUG(dbgs() << "Converting pair: ");
LLVM_DEBUG(SrcMI->dump());
LLVM_DEBUG(MI.dump());
MI.setDesc(TII->get(PPC::RLDIC));
MI.getOperand(1).setReg(SrcMI->getOperand(1).getReg());
MI.getOperand(2).setImm(NewSH);
MI.getOperand(3).setImm(NewMB);
LLVM_DEBUG(dbgs() << "To: ");
LLVM_DEBUG(MI.dump());
NumRotatesCollapsed++;
}
} // end default namespace
INITIALIZE_PASS_BEGIN(PPCMIPeephole, DEBUG_TYPE,