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Moving register scavenging to a post pass results in virtual registers in
the instruction we're scavenging for. The scavenger needs to know to avoid them when analyzing register usage. llvm-svn: 83077
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@ -241,7 +241,8 @@ unsigned RegScavenger::findSurvivorReg(MachineBasicBlock::iterator MI,
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// Remove any candidates touched by instruction.
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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if (!MO.isReg() || MO.isUndef() || !MO.getReg())
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if (!MO.isReg() || MO.isUndef() || !MO.getReg() ||
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TRI->isVirtualRegister(MO.getReg()))
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continue;
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Candidates.reset(MO.getReg());
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for (const unsigned *R = TRI->getAliasSet(MO.getReg()); *R; R++)
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@ -279,7 +280,7 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
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// Exclude all the registers being used by the instruction.
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for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = I->getOperand(i);
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if (MO.isReg())
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if (MO.isReg() && !TRI->isVirtualRegister(MO.getReg()))
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Candidates.reset(MO.getReg());
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}
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