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DAGCombiner: Replace store of FP constant after attemping store merges
If storing multiple FP constants, some subset of the stores would be replaced with integers due to visit order, so MergeConsecutiveStores would only partially merge these. llvm-svn: 248169
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@ -11485,16 +11485,6 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) {
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if (Value.getOpcode() == ISD::UNDEF && ST->isUnindexed())
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return Chain;
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// Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr'
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//
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// Make sure to do this only after attempting to merge stores in order to
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// avoid changing the types of some subset of stores due to visit order,
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// preventing their merging.
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if (isa<ConstantFPSDNode>(Value)) {
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if (SDValue NewSt = replaceStoreOfFPConstant(ST))
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return NewSt;
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}
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// Try to infer better alignment information than the store already has.
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if (OptLevel != CodeGenOpt::None && ST->isUnindexed()) {
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if (unsigned Align = DAG.InferPtrAlignment(Ptr)) {
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@ -11618,6 +11608,16 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) {
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return SDValue(N, 0);
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}
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// Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr'
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//
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// Make sure to do this only after attempting to merge stores in order to
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// avoid changing the types of some subset of stores due to visit order,
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// preventing their merging.
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if (isa<ConstantFPSDNode>(Value)) {
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if (SDValue NewSt = replaceStoreOfFPConstant(ST))
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return NewSt;
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}
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return ReduceLoadOpStoreWidth(N);
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}
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@ -121,10 +121,7 @@ define void @merge_global_store_4_constants_i32(i32 addrspace(1)* %out) #0 {
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}
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; GCN-LABEL: {{^}}merge_global_store_4_constants_f32_order:
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; XGCN: buffer_store_dwordx4
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; GCN: buffer_store_dword v
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; GCN: buffer_store_dword v
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; GCN: buffer_store_dwordx2 v
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; GCN: buffer_store_dwordx4
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define void @merge_global_store_4_constants_f32_order(float addrspace(1)* %out) #0 {
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%out.gep.1 = getelementptr float, float addrspace(1)* %out, i32 1
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%out.gep.2 = getelementptr float, float addrspace(1)* %out, i32 2
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@ -137,17 +134,9 @@ define void @merge_global_store_4_constants_f32_order(float addrspace(1)* %out)
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ret void
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}
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; First store is out of order. Because of order of combines, the
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; consecutive store fails because only some of the stores have been
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; replaced with integer constant stores, and then won't merge because
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; the types are different.
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; First store is out of order.
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; GCN-LABEL: {{^}}merge_global_store_4_constants_f32:
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; XGCN: buffer_store_dwordx4
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; GCN: buffer_store_dword v
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; GCN: buffer_store_dword v
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; GCN: buffer_store_dword v
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; GCN: buffer_store_dword v
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; GCN: buffer_store_dwordx4
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define void @merge_global_store_4_constants_f32(float addrspace(1)* %out) #0 {
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%out.gep.1 = getelementptr float, float addrspace(1)* %out, i32 1
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%out.gep.2 = getelementptr float, float addrspace(1)* %out, i32 2
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@ -160,6 +149,29 @@ define void @merge_global_store_4_constants_f32(float addrspace(1)* %out) #0 {
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ret void
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}
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; FIXME: Should be able to merge this
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; GCN-LABEL: {{^}}merge_global_store_4_constants_mixed_i32_f32:
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; XGCN: buffer_store_dwordx4
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; GCN: buffer_store_dword
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; GCN: buffer_store_dword
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; GCN: buffer_store_dword
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; GCN: buffer_store_dword
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; GCN: s_endpgm
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define void @merge_global_store_4_constants_mixed_i32_f32(float addrspace(1)* %out) #0 {
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%out.gep.1 = getelementptr float, float addrspace(1)* %out, i32 1
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%out.gep.2 = getelementptr float, float addrspace(1)* %out, i32 2
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%out.gep.3 = getelementptr float, float addrspace(1)* %out, i32 3
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%out.gep.1.bc = bitcast float addrspace(1)* %out.gep.1 to i32 addrspace(1)*
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%out.gep.3.bc = bitcast float addrspace(1)* %out.gep.3 to i32 addrspace(1)*
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store i32 11, i32 addrspace(1)* %out.gep.1.bc
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store float 2.0, float addrspace(1)* %out.gep.2
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store i32 17, i32 addrspace(1)* %out.gep.3.bc
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store float 8.0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}merge_global_store_3_constants_i32:
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; SI-DAG: buffer_store_dwordx2
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; SI-DAG: buffer_store_dword
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28
test/CodeGen/PowerPC/vector-merge-store-fp-constants.ll
Normal file
28
test/CodeGen/PowerPC/vector-merge-store-fp-constants.ll
Normal file
@ -0,0 +1,28 @@
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; RUN: llc -march=ppc64 -mtriple=ppc64-apple-darwin < %s | FileCheck %s
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; CHECK-LABEL: {{^}}_merge_8_float_zero_stores:
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; CHECK: li [[ZEROREG:r[0-9]+]], 0
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; CHECK-DAG: std [[ZEROREG]], 0([[PTR:r[0-9]+]])
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; CHECK-DAG: std [[ZEROREG]], 8([[PTR]])
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; CHECK-DAG: std [[ZEROREG]], 16([[PTR]])
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; CHECK-DAG: std [[ZEROREG]], 24([[PTR]])
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; CHECK: blr
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define void @merge_8_float_zero_stores(float* %ptr) {
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%idx0 = getelementptr float, float* %ptr, i64 0
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%idx1 = getelementptr float, float* %ptr, i64 1
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%idx2 = getelementptr float, float* %ptr, i64 2
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%idx3 = getelementptr float, float* %ptr, i64 3
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%idx4 = getelementptr float, float* %ptr, i64 4
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%idx5 = getelementptr float, float* %ptr, i64 5
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%idx6 = getelementptr float, float* %ptr, i64 6
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%idx7 = getelementptr float, float* %ptr, i64 7
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store float 0.0, float* %idx0, align 4
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store float 0.0, float* %idx1, align 4
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store float 0.0, float* %idx2, align 4
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store float 0.0, float* %idx3, align 4
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store float 0.0, float* %idx4, align 4
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store float 0.0, float* %idx5, align 4
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store float 0.0, float* %idx6, align 4
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store float 0.0, float* %idx7, align 4
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ret void
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}
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35
test/CodeGen/X86/vector-merge-store-fp-constants.ll
Normal file
35
test/CodeGen/X86/vector-merge-store-fp-constants.ll
Normal file
@ -0,0 +1,35 @@
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; RUN: llc -march=x86-64 -mtriple=x86_64-unknown-unknown < %s | FileCheck -check-prefix=DEFAULTCPU -check-prefix=ALL %s
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; RUN: llc -march=x86-64 -mcpu=x86-64 -mtriple=x86_64-unknown-unknown < %s | FileCheck -check-prefix=X8664CPU -check-prefix=ALL %s
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; ALL-LABEL: {{^}}merge_8_float_zero_stores:
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; DEFAULTCPU-DAG: movq $0, ([[PTR:%[a-z]+]])
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; DEFAULTCPU-DAG: movq $0, 8([[PTR]])
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; DEFAULTCPU-DAG: movq $0, 16([[PTR]])
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; DEFAULTCPU-DAG: movq $0, 24([[PTR]])
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; X8664CPU: xorps [[ZEROREG:%xmm[0-9]+]], [[ZEROREG]]
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; X8664CPU-DAG: movups [[ZEROREG]], ([[PTR:%[a-z]+]])
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; X8664CPU-DAG: movups [[ZEROREG]], 16([[PTR:%[a-z]+]])
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; ALL: retq
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define void @merge_8_float_zero_stores(float* %ptr) {
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%idx0 = getelementptr float, float* %ptr, i64 0
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%idx1 = getelementptr float, float* %ptr, i64 1
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%idx2 = getelementptr float, float* %ptr, i64 2
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%idx3 = getelementptr float, float* %ptr, i64 3
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%idx4 = getelementptr float, float* %ptr, i64 4
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%idx5 = getelementptr float, float* %ptr, i64 5
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%idx6 = getelementptr float, float* %ptr, i64 6
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%idx7 = getelementptr float, float* %ptr, i64 7
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store float 0.0, float* %idx0, align 4
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store float 0.0, float* %idx1, align 4
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store float 0.0, float* %idx2, align 4
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store float 0.0, float* %idx3, align 4
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store float 0.0, float* %idx4, align 4
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store float 0.0, float* %idx5, align 4
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store float 0.0, float* %idx6, align 4
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store float 0.0, float* %idx7, align 4
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ret void
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}
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