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implement uncond branch insertion, mark branches with isBranch.

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llvm-svn: 31160
This commit is contained in:
Chris Lattner 2006-10-24 16:47:57 +00:00
parent 34b009bf45
commit 71dc932fcb
3 changed files with 13 additions and 1 deletions
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8
lib/Target/ARM/ARMInstrInfo.cpp
View File

@ -48,3 +48,11 @@ bool ARMInstrInfo::isMoveInstr(const MachineInstr &MI,
}
return false;
}
void ARMInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
const std::vector<MachineOperand> &Cond)const{
// Can only insert uncond branches so far.
assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!");
BuildMI(&MBB, ARM::b, 1).addMBB(TBB);
}

4
lib/Target/ARM/ARMInstrInfo.h
View File

@ -40,6 +40,10 @@ public:
///
virtual bool isMoveInstr(const MachineInstr &MI,
unsigned &SrcReg, unsigned &DstReg) const;
virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
const std::vector<MachineOperand> &Cond) const;
};
}

2
lib/Target/ARM/ARMInstrInfo.td
View File

@ -227,7 +227,7 @@ let Defs = [R0] in {
def UMULL : IntBinOp<"umull r12,", mulhu>;
}
let isTerminator = 1 in {
let isTerminator = 1, isBranch = 1 in {
def bcond : InstARM<(ops brtarget:$dst, CCOp:$cc),
"b$cc $dst",
[(armbr bb:$dst, imm:$cc)]>;