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[ARM] Fix a bug in constant island pass that was triggering an assertion.
The assert was being triggered when the distance between a constant pool entry and its user exceeded the maximally allowed distance after thumb2 branch shortening. A padding was inserted after a thumb2 branch instruction was shrunk, which caused the user to be out of range. This is wrong as the padding should have been inserted by the layout algorithm so that the distance between two instructions doesn't grow later during thumb2 instruction optimization. This commit fixes the code in ARMConstantIslands::createNewWater to call computeBlockSize and set BasicBlock::Unalign when a branch instruction is inserted to create new water after a basic block. A non-zero Unalign causes the worst-case padding to be inserted when adjustBBOffsetsAfter is called to recompute the basic block offsets. rdar://problem/19130476 llvm-svn: 225467
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@ -1270,7 +1270,7 @@ void ARMConstantIslands::createNewWater(unsigned CPUserIndex,
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unsigned MaxDisp = getUnconditionalBrDisp(UncondBr);
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ImmBranches.push_back(ImmBranch(&UserMBB->back(),
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MaxDisp, false, UncondBr));
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BBInfo[UserMBB->getNumber()].Size += Delta;
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computeBlockSize(UserMBB);
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adjustBBOffsetsAfter(UserMBB);
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return;
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}
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42
test/CodeGen/Thumb2/constant-islands-new-island-padding.ll
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42
test/CodeGen/Thumb2/constant-islands-new-island-padding.ll
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@ -0,0 +1,42 @@
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; RUN: llc < %s -mtriple=thumbv7-apple-ios %s -o - | FileCheck %s
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@g0 = common global i32 0, align 4
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@d0 = common global double 0.000000e+00, align 8
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@f0 = common global float 0.000000e+00, align 4
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@g1 = common global i32 0, align 4
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declare i32 @llvm.arm.space(i32, i32)
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; Check that the constant island pass moves the float constant pool entry inside
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; the function.
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; CHECK: .long 1067320814 @ float 1.23455596
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; CHECK: {{.*}} %do.end
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define i32 @testpadding(i32 %a) {
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entry:
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%0 = load i32* @g0, align 4
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%add = add nsw i32 %0, 12
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store i32 %add, i32* @g0, align 4
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%1 = load double* @d0, align 8
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%add1 = fadd double %1, 0x3FF3C0B8ED46EACB
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store double %add1, double* @d0, align 8
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%tmpcall11 = call i32 @llvm.arm.space(i32 28, i32 undef)
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call void @foo20(i32 191)
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%2 = load float* @f0, align 4
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%add2 = fadd float %2, 0x3FF3C0BDC0000000
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store float %add2, float* @f0, align 4
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br label %do.body
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do.body: ; preds = %do.body, %entry
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tail call void @foo20(i32 19)
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%3 = load i32* @g1, align 4
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%tobool = icmp eq i32 %3, 0
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br i1 %tobool, label %do.end, label %do.body
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do.end: ; preds = %do.body
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%tmpcall111 = call i32 @llvm.arm.space(i32 954, i32 undef)
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ret i32 10
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}
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declare void @foo20(i32)
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