Revert -r278267 [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers

This change cause performance regression on MultiSource/Benchmarks/TSVC/Symbolics-flt/Symbolics-flt from LNT and some other bechmarks.

See https://reviews.llvm.org/D18777 for details.

llvm-svn: 279433
This commit is contained in:
Artur Pilipenko 2016-08-22 13:14:07 +00:00
parent c66cf988a6
commit 7913289c6e
2 changed files with 2 additions and 38 deletions

View File

@ -1259,9 +1259,7 @@ static void computeKnownBitsFromOperator(const Operator *I, APInt &KnownZero,
unsigned Opcode = LU->getOpcode();
// Check for operations that have the property that if
// both their operands have low zero bits, the result
// will have low zero bits. Also check for operations
// that are known to produce non-negative or negative
// recurrence values.
// will have low zero bits.
if (Opcode == Instruction::Add ||
Opcode == Instruction::Sub ||
Opcode == Instruction::And ||
@ -1287,40 +1285,6 @@ static void computeKnownBitsFromOperator(const Operator *I, APInt &KnownZero,
KnownZero = APInt::getLowBitsSet(BitWidth,
std::min(KnownZero2.countTrailingOnes(),
KnownZero3.countTrailingOnes()));
auto *OverflowOp = dyn_cast<OverflowingBinaryOperator>(LU);
if (OverflowOp && OverflowOp->hasNoSignedWrap()) {
// If initial value of recurrence is nonnegative, and we are adding
// a nonnegative number with nsw, the result can only be nonnegative
// or poison value regardless of the number of times we execute the
// add in phi recurrence. If initial value is negative and we are
// adding a negative number with nsw, the result can only be
// negative or poison value. Similar arguments apply to sub and mul.
//
// (add non-negative, non-negative) --> non-negative
// (add negative, negative) --> negative
if (Opcode == Instruction::Add) {
if (KnownZero2.isNegative() && KnownZero3.isNegative())
KnownZero.setBit(BitWidth - 1);
else if (KnownOne2.isNegative() && KnownOne3.isNegative())
KnownOne.setBit(BitWidth - 1);
}
// (sub nsw non-negative, negative) --> non-negative
// (sub nsw negative, non-negative) --> negative
else if (Opcode == Instruction::Sub && LL == I) {
if (KnownZero2.isNegative() && KnownOne3.isNegative())
KnownZero.setBit(BitWidth - 1);
else if (KnownOne2.isNegative() && KnownZero3.isNegative())
KnownOne.setBit(BitWidth - 1);
}
// (mul nsw non-negative, non-negative) --> non-negative
else if (Opcode == Instruction::Mul && KnownZero2.isNegative() &&
KnownZero3.isNegative())
KnownZero.setBit(BitWidth - 1);
}
break;
}
}

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@ -83,7 +83,7 @@ for.body: ; preds = %for.body, %entry
; CHECK-UNRL: %add12 = fadd <2 x double> %add7, %mul11
; CHECK-UNRL: %4 = bitcast double* %arrayidx14 to <2 x double>*
; CHECK-UNRL: store <2 x double> %add12, <2 x double>* %4, align 8
; CHECK-UNRL: %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
; CHECK-UNRL: %indvars.iv.next.1 = add nsw i64 %indvars.iv, 2
; CHECK-UNRL: %lftr.wideiv.1 = trunc i64 %indvars.iv.next.1 to i32
; CHECK-UNRL: %exitcond.1 = icmp eq i32 %lftr.wideiv.1, 10
; CHECK-UNRL: br i1 %exitcond.1, label %for.end, label %for.body