Revert r163878 as it breaks on targets with alternate register names. Such targets do not exist in the main tree so this was not noticed.

llvm-svn: 163959
This commit is contained in:
Craig Topper 2012-09-15 01:22:42 +00:00
parent 5540fca519
commit 7989d0ccdc
2 changed files with 4 additions and 6 deletions

View File

@ -575,13 +575,12 @@ emitRegisterNameString(raw_ostream &O, StringRef AltName,
StringTable.add(AsmName);
}
unsigned Entries = StringTable.layout();
StringTable.layout();
O << " static const char AsmStrs" << AltName << "[] = {\n";
StringTable.emit(O, printChar);
O << " };\n\n";
O << " static const uint" << ((Entries > 0xffff) ? "32" : "16")
<< "_t RegAsmOffset" << AltName << "[] = {";
O << " static const uint32_t RegAsmOffset" << AltName << "[] = {";
for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
if ((i % 14) == 0)
O << "\n ";
@ -620,7 +619,7 @@ void AsmWriterEmitter::EmitGetRegisterName(raw_ostream &O) {
emitRegisterNameString(O, "", Registers);
if (hasAltNames) {
O << " const unsigned *RegAsmOffset;\n"
O << " const uint32_t *RegAsmOffset;\n"
<< " const char *AsmStrs;\n"
<< " switch(AltIdx) {\n"
<< " default: llvm_unreachable(\"Invalid register alt name index!\");\n";

View File

@ -84,7 +84,7 @@ public:
bool empty() const { return Seqs.empty(); }
/// layout - Computes the final table layout.
unsigned layout() {
void layout() {
assert(Entries == 0 && "Can only call layout() once");
// Lay out the table in Seqs iteration order.
for (typename SeqMap::iterator I = Seqs.begin(), E = Seqs.end(); I != E;
@ -93,7 +93,6 @@ public:
// Include space for a terminator.
Entries += I->first.size() + 1;
}
return Entries;
}
/// get - Returns the offset of Seq in the final table.