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Remove uses of getCalleeSavedRegClasses from outside the
backends and removes the virtual declaration. With that out of the way I should be able to cleanup one backend at a time. llvm-svn: 105321
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@ -319,6 +319,10 @@ public:
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virtual const TargetRegisterClass *
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getPhysicalRegisterRegClass(unsigned Reg, EVT VT = MVT::Other) const;
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/// getMinimalPhysRegClass - Returns the Register Class of a physical
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/// register of the given type.
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const TargetRegisterClass * getMinimalPhysRegClass(unsigned Reg) const;
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/// getAllocatableSet - Returns a bitset indexed by register number
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/// indicating if a register is allocatable or not. If a register class is
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/// specified, returns the subset for the class.
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@ -438,11 +442,6 @@ public:
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virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF = 0)
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const = 0;
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/// getCalleeSavedRegClasses - Return a null-terminated list of the preferred
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/// register classes to spill each callee saved register with. The order and
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/// length of this list match the getCalleeSaveRegs() list.
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virtual const TargetRegisterClass* const *getCalleeSavedRegClasses(
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const MachineFunction *MF) const =0;
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/// getReservedRegs - Returns a bitset indexed by physical register number
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/// indicating if a register is a special register that has particular uses
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@ -202,22 +202,18 @@ void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) {
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if (Fn.getFunction()->hasFnAttr(Attribute::Naked))
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return;
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// Figure out which *callee saved* registers are modified by the current
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// function, thus needing to be saved and restored in the prolog/epilog.
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const TargetRegisterClass * const *CSRegClasses =
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RegInfo->getCalleeSavedRegClasses(&Fn);
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std::vector<CalleeSavedInfo> CSI;
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for (unsigned i = 0; CSRegs[i]; ++i) {
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unsigned Reg = CSRegs[i];
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const TargetRegisterClass *RC = RegInfo->getMinimalPhysRegClass(Reg);
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if (Fn.getRegInfo().isPhysRegUsed(Reg)) {
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// If the reg is modified, save it!
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CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i]));
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CSI.push_back(CalleeSavedInfo(Reg, RC));
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} else {
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for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
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*AliasSet; ++AliasSet) { // Check alias registers too.
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if (Fn.getRegInfo().isPhysRegUsed(*AliasSet)) {
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CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i]));
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CSI.push_back(CalleeSavedInfo(Reg, RC));
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break;
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}
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}
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@ -60,6 +60,25 @@ TargetRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, EVT VT) const {
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return BestRC;
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}
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/// getMinimalPhysRegClass - Returns the Register Class of a physical
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/// register of the given type.
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const TargetRegisterClass *
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TargetRegisterInfo::getMinimalPhysRegClass(unsigned reg) const {
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assert(isPhysicalRegister(reg) && "reg must be a physical register");
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// Pick the most sub register class of the right type that contains
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// this physreg.
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const TargetRegisterClass* BestRC = 0;
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for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){
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const TargetRegisterClass* RC = *I;
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if (RC->contains(reg) && (!BestRC || BestRC->hasSubClass(RC)))
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BestRC = RC;
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}
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assert(BestRC && "Couldn't find the register class");
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return BestRC;
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}
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/// getAllocatableSetForRC - Toggle the bits that represent allocatable
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/// registers for the specific register class.
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static void getAllocatableSetForRC(const MachineFunction &MF,
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