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[mips] Clean up definitions of move word from/to coprocessor instructions.

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No functionality change.

llvm-svn: 189431
This commit is contained in:
Akira Hatanaka 2013-08-28 00:42:50 +00:00
parent 0b207e7a0c
commit 7d0dc48845
2 changed files with 20 additions and 46 deletions
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30
lib/Target/Mips/Mips64InstrInfo.td
View File

@ -320,28 +320,16 @@ def : InstAlias<"dadd $rs, $rt, $imm",
0>;
/// Move between CPU and coprocessor registers
let DecoderNamespace = "Mips64" in {
def DMFC0_3OP64 : MFC3OP<(outs GPR64Opnd:$rt),
(ins GPR64Opnd:$rd, uimm16:$sel),
"dmfc0\t$rt, $rd, $sel">, MFC3OP_FM<0x10, 1>;
def DMTC0_3OP64 : MFC3OP<(outs GPR64Opnd:$rd, uimm16:$sel),
(ins GPR64Opnd:$rt),
"dmtc0\t$rt, $rd, $sel">, MFC3OP_FM<0x10, 5>;
def DMFC2_3OP64 : MFC3OP<(outs GPR64Opnd:$rt),
(ins GPR64Opnd:$rd, uimm16:$sel),
"dmfc2\t$rt, $rd, $sel">, MFC3OP_FM<0x12, 1>;
def DMTC2_3OP64 : MFC3OP<(outs GPR64Opnd:$rd, uimm16:$sel),
(ins GPR64Opnd:$rt),
"dmtc2\t$rt, $rd, $sel">, MFC3OP_FM<0x12, 5>;
let DecoderNamespace = "Mips64", Predicates = [HasMips64] in {
def DMFC0 : MFC3OP<"dmfc0", GPR64Opnd>, MFC3OP_FM<0x10, 1>;
def DMTC0 : MFC3OP<"dmtc0", GPR64Opnd>, MFC3OP_FM<0x10, 5>;
def DMFC2 : MFC3OP<"dmfc2", GPR64Opnd>, MFC3OP_FM<0x12, 1>;
def DMTC2 : MFC3OP<"dmtc2", GPR64Opnd>, MFC3OP_FM<0x12, 5>;
}
// Two operand (implicit 0 selector) versions:
def : InstAlias<"dmfc0 $rt, $rd",
(DMFC0_3OP64 GPR64Opnd:$rt, GPR64Opnd:$rd, 0), 0>;
def : InstAlias<"dmtc0 $rt, $rd",
(DMTC0_3OP64 GPR64Opnd:$rd, 0, GPR64Opnd:$rt), 0>;
def : InstAlias<"dmfc2 $rt, $rd",
(DMFC2_3OP64 GPR64Opnd:$rt, GPR64Opnd:$rd, 0), 0>;
def : InstAlias<"dmtc2 $rt, $rd",
(DMTC2_3OP64 GPR64Opnd:$rd, 0, GPR64Opnd:$rt), 0>;
def : InstAlias<"dmfc0 $rt, $rd", (DMFC0 GPR64Opnd:$rt, GPR64Opnd:$rd, 0), 0>;
def : InstAlias<"dmtc0 $rt, $rd", (DMTC0 GPR64Opnd:$rt, GPR64Opnd:$rd, 0), 0>;
def : InstAlias<"dmfc2 $rt, $rd", (DMFC2 GPR64Opnd:$rt, GPR64Opnd:$rd, 0), 0>;
def : InstAlias<"dmtc2 $rt, $rd", (DMTC2 GPR64Opnd:$rt, GPR64Opnd:$rd, 0), 0>;

36
lib/Target/Mips/MipsInstrInfo.td
View File

@ -773,8 +773,9 @@ class SCBase<string opstr, RegisterOperand RO> :
let Constraints = "$rt = $dst";
}
class MFC3OP<dag outs, dag ins, string asmstr> :
InstSE<outs, ins, asmstr, [], NoItinerary, FrmFR>;
class MFC3OP<string asmstr, RegisterOperand RO> :
InstSE<(outs RO:$rt, RO:$rd, uimm16:$sel), (ins),
!strconcat(asmstr, "\t$rt, $rd, $sel"), [], NoItinerary, FrmFR>;
let isBarrier = 1, isTerminator = 1, isCodeGenOnly = 1 in
def TRAP : InstSE<(outs), (ins), "break", [(trap)], NoItinerary, FrmOther> {
@ -1046,21 +1047,10 @@ def EXT : ExtBase<"ext", GPR32Opnd>, EXT_FM<0>;
def INS : InsBase<"ins", GPR32Opnd>, EXT_FM<4>;
/// Move Control Registers From/To CPU Registers
def MFC0_3OP : MFC3OP<(outs GPR32Opnd:$rt),
(ins GPR32Opnd:$rd, uimm16:$sel),
"mfc0\t$rt, $rd, $sel">, MFC3OP_FM<0x10, 0>;
def MTC0_3OP : MFC3OP<(outs GPR32Opnd:$rd, uimm16:$sel),
(ins GPR32Opnd:$rt),
"mtc0\t$rt, $rd, $sel">, MFC3OP_FM<0x10, 4>;
def MFC2_3OP : MFC3OP<(outs GPR32Opnd:$rt),
(ins GPR32Opnd:$rd, uimm16:$sel),
"mfc2\t$rt, $rd, $sel">, MFC3OP_FM<0x12, 0>;
def MTC2_3OP : MFC3OP<(outs GPR32Opnd:$rd, uimm16:$sel),
(ins GPR32Opnd:$rt),
"mtc2\t$rt, $rd, $sel">, MFC3OP_FM<0x12, 4>;
def MFC0 : MFC3OP<"mfc0", GPR32Opnd>, MFC3OP_FM<0x10, 0>;
def MTC0 : MFC3OP<"mtc0", GPR32Opnd>, MFC3OP_FM<0x10, 4>;
def MFC2 : MFC3OP<"mfc2", GPR32Opnd>, MFC3OP_FM<0x12, 0>;
def MTC2 : MFC3OP<"mtc2", GPR32Opnd>, MFC3OP_FM<0x12, 4>;
//===----------------------------------------------------------------------===//
// Instruction aliases
@ -1092,14 +1082,10 @@ def : InstAlias<"xor $rs, $rt, $imm",
def : InstAlias<"or $rs, $rt, $imm",
(ORi GPR32Opnd:$rs, GPR32Opnd:$rt, uimm16:$imm), 0>;
def : InstAlias<"nop", (SLL ZERO, ZERO, 0), 1>;
def : InstAlias<"mfc0 $rt, $rd",
(MFC0_3OP GPR32Opnd:$rt, GPR32Opnd:$rd, 0), 0>;
def : InstAlias<"mtc0 $rt, $rd",
(MTC0_3OP GPR32Opnd:$rd, 0, GPR32Opnd:$rt), 0>;
def : InstAlias<"mfc2 $rt, $rd",
(MFC2_3OP GPR32Opnd:$rt, GPR32Opnd:$rd, 0), 0>;
def : InstAlias<"mtc2 $rt, $rd",
(MTC2_3OP GPR32Opnd:$rd, 0, GPR32Opnd:$rt), 0>;
def : InstAlias<"mfc0 $rt, $rd", (MFC0 GPR32Opnd:$rt, GPR32Opnd:$rd, 0), 0>;
def : InstAlias<"mtc0 $rt, $rd", (MTC0 GPR32Opnd:$rt, GPR32Opnd:$rd, 0), 0>;
def : InstAlias<"mfc2 $rt, $rd", (MFC2 GPR32Opnd:$rt, GPR32Opnd:$rd, 0), 0>;
def : InstAlias<"mtc2 $rt, $rd", (MTC2 GPR32Opnd:$rt, GPR32Opnd:$rd, 0), 0>;
def : InstAlias<"bnez $rs,$offset",
(BNE GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>;
def : InstAlias<"beqz $rs,$offset",