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[MachineOutliner] Drop candidates that require fixups if it's beneficial
If it's a bigger code size win to drop candidates that require stack fixups than to demote every candidate to that variant, the outliner should do that. This happens if the number of bytes taken by calls to functions that don't require fixups, plus the number of bytes that'd be left is less than the number of bytes that it'd take to emit a save + restore for all candidates. Also add tests for each possible new behaviour. - machine-outliner-compatible-candidates shows that when we have candidates that don't use the stack, we can use the default call variant along with the no save/regsave variant. - machine-outliner-all-stack shows that when it's better to fix up the stack, we still will demote all candidates to that case - machine-outliner-drop-stack shows that we can discard candidates that require stack fixups when it would be beneficial to do so. llvm-svn: 348168
This commit is contained in:
Jessica Paquette
parent
6fc5489b62
commit
7d1c45a131
@ -5169,32 +5169,51 @@ AArch64InstrInfo::getOutliningCandidateInfo(
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// We need to decide how to emit calls + frames. We can always emit the same
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// frame if we don't need to save to the stack. If we have to save to the
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// stack, then we need a different frame.
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unsigned NumNoStackSave = 0;
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unsigned NumBytesNoStackCalls = 0;
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std::vector<outliner::Candidate> CandidatesWithoutStackFixups;
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for (outliner::Candidate &C : RepeatedSequenceLocs) {
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C.initLRU(TRI);
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// Is LR available? If so, we don't need a save.
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if (C.LRU.available(AArch64::LR)) {
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NumBytesNoStackCalls += 4;
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C.setCallInfo(MachineOutlinerNoLRSave, 4);
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++NumNoStackSave;
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CandidatesWithoutStackFixups.push_back(C);
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}
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// Is an unused register available? If so, we won't modify the stack, so
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// we can outline with the same frame type as those that don't save LR.
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else if (findRegisterToSaveLRTo(C)) {
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NumBytesNoStackCalls += 12;
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C.setCallInfo(MachineOutlinerRegSave, 12);
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++NumNoStackSave;
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CandidatesWithoutStackFixups.push_back(C);
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}
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// Is SP used in the sequence at all? If not, we don't have to modify
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// the stack, so we are guaranteed to get the same frame.
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else if (C.UsedInSequence.available(AArch64::SP)) {
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NumBytesNoStackCalls += 12;
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C.setCallInfo(MachineOutlinerDefault, 12);
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CandidatesWithoutStackFixups.push_back(C);
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}
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// If we outline this, we need to modify the stack. Pretend we don't
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// outline this by saving all of its bytes.
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else {
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NumBytesNoStackCalls += SequenceSize;
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}
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}
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// If there are no places where we have to save LR, then note that we don't
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// have to update the stack. Otherwise, give every candidate the default
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// call type.
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if (NumNoStackSave == RepeatedSequenceLocs.size())
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if (NumBytesNoStackCalls <= RepeatedSequenceLocs.size() * 12) {
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RepeatedSequenceLocs = CandidatesWithoutStackFixups;
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FrameID = MachineOutlinerNoLRSave;
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else
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} else {
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SetCandidateCallInfo(MachineOutlinerDefault, 12);
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}
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}
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// Does every candidate's MBB contain a call? If so, then we might have a call
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112
test/CodeGen/AArch64/machine-outliner-all-stack.mir
Normal file
112
test/CodeGen/AArch64/machine-outliner-all-stack.mir
Normal file
@ -0,0 +1,112 @@
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# RUN: llc -mtriple=aarch64--- -run-pass=machine-outliner \
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# RUN: -verify-machineinstrs %s -o - | FileCheck %s
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# Show that, when instructions that use the stack are present, it's possible
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# for us to outline everything as the default outlining type.
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# It's possible for reg-save-possible to outline by storing LR to a register,
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# but most candidates in this case require us to modify the stack. The outliner
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# should see that it's more beneficial to fix up instructions and save LR to
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# the stack in this case.
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--- |
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define void @reg-save-possible() #0 { ret void }
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define void @stack-save1() #0 { ret void }
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define void @stack-save2() #0 { ret void }
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define void @stack-save3() #0 { ret void }
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attributes #0 = { minsize noinline noredzone "no-frame-pointer-elim"="true" }
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...
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---
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name: reg-save-possible
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $lr
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$lr = ORRXri $xzr, 1
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$x19 = ORRXri $xzr, 1
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$x20 = ORRXri $xzr, 1
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bb.1:
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liveins: $lr
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; CHECK-LABEL: name: reg-save-possible
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; CHECK: $sp = STRXpre $lr, $sp, -16
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; CHECK-NEXT: BL [[FN:@OUTLINED_FUNCTION_[0-9]+]]
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; CHECK-NEXT: $sp, $lr = LDRXpost $sp, 16
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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bb.2:
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RET undef $lr
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...
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---
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name: stack-save1
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x18, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
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$lr = ORRXri $xzr, 1
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bb.1:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x18, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
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; CHECK-LABEL: name: stack-save1
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; CHECK: $sp = STRXpre $lr, $sp, -16
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; CHECK-NEXT: BL [[FN]]
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; CHECK-NEXT: $sp, $lr = LDRXpost $sp, 16
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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bb.2:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x18, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
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RET undef $lr
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...
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---
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name: stack-save2
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x18, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
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$lr = ORRXri $xzr, 1
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bb.1:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x18, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
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; CHECK-LABEL: name: stack-save2
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; CHECK: $sp = STRXpre $lr, $sp, -16
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; CHECK-NEXT: BL [[FN]]
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; CHECK-NEXT: $sp, $lr = LDRXpost $sp, 16
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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bb.2:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x18, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
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RET undef $lr
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...
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---
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name: stack-save3
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x18, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
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$lr = ORRXri $xzr, 1
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bb.1:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x18, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
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; CHECK-LABEL: name: stack-save3
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; CHECK: $sp = STRXpre $lr, $sp, -16
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; CHECK-NEXT: BL [[FN]]
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; CHECK-NEXT: $sp, $lr = LDRXpost $sp, 16
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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$x20, $x19 = LDPXi $sp, 10
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bb.2:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x18, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
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RET undef $lr
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103
test/CodeGen/AArch64/machine-outliner-compatible-candidates.mir
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103
test/CodeGen/AArch64/machine-outliner-compatible-candidates.mir
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@ -0,0 +1,103 @@
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# RUN: llc -mtriple=aarch64--- -run-pass=machine-outliner \
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# RUN: -verify-machineinstrs %s -o - | FileCheck %s
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# Ensure that we can outline candidates with compatible call/frame classes.
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#
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# - Save/restores that don't impact the stack can be outlined together.
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# - Save/restores that impact the stack if the outlined sequence doesn't use
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# the stack.
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--- |
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define void @no-save1() #0 { ret void }
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define void @no-save2() #0 { ret void }
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define void @reg-save() #0 { ret void }
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define void @stack-save() #0 { ret void }
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attributes #0 = { minsize noinline noredzone "no-frame-pointer-elim"="true" }
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...
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---
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name: no-save1
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $lr
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$lr = ORRXri $xzr, 1
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bb.1:
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; CHECK-LABEL: name: no-save1
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; CHECK: BL [[FN:@OUTLINED_FUNCTION_[0-9]+]]
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; CHECK-NOT: STRXpre
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; CHECK-NOT: $lr =
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; CHECK-NOT: ORRXrs
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$w11 = ORRWri $wzr, 1
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$w11 = ORRWri $wzr, 1
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$w11 = ORRWri $wzr, 1
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$w11 = ORRWri $wzr, 1
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bb.2:
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RET undef $lr
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...
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---
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name: no-save2
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $lr
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$lr = ORRXri $xzr, 1
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bb.1:
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; CHECK-LABEL: name: no-save2
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; CHECK: BL [[FN]]
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; CHECK-NOT: STRXpre
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; CHECK-NOT: $lr =
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; CHECK-NOT: ORRXrs
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$w11 = ORRWri $wzr, 1
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$w11 = ORRWri $wzr, 1
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$w11 = ORRWri $wzr, 1
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$w11 = ORRWri $wzr, 1
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bb.2:
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RET undef $lr
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...
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---
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name: reg-save
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $lr
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$lr = ORRXri $xzr, 1
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bb.1:
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liveins: $lr
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; CHECK-LABEL: name: reg-save
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; CHECK: $[[REG:x[0-9]+]] = ORRXrs $xzr, $lr, 0
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; CHECK-NEXT: BL [[FN]]
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; CHECK-NEXT: $lr = ORRXrs $xzr, $[[REG]], 0
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$w11 = ORRWri $wzr, 1
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$w11 = ORRWri $wzr, 1
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$w11 = ORRWri $wzr, 1
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$w11 = ORRWri $wzr, 1
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bb.2:
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liveins: $lr
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RET undef $lr
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...
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---
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name: stack-save
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x18, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
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$lr = ORRXri $xzr, 1
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bb.1:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x18, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
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; CHECK-LABEL: name: stack-save
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; CHECK: $sp = STRXpre $lr, $sp, -16
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; CHECK-NEXT: BL [[FN]]
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; CHECK-NEXT: $sp, $lr = LDRXpost $sp, 16
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$w11 = ORRWri $wzr, 1
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$w11 = ORRWri $wzr, 1
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$w11 = ORRWri $wzr, 1
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$w11 = ORRWri $wzr, 1
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bb.2:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x18, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
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RET undef $lr
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99
test/CodeGen/AArch64/machine-outliner-drop-stack.mir
Normal file
99
test/CodeGen/AArch64/machine-outliner-drop-stack.mir
Normal file
@ -0,0 +1,99 @@
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# RUN: llc -mtriple=aarch64--- -run-pass=machine-outliner \
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# RUN: -verify-machineinstrs %s -o - | FileCheck %s
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--- |
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define void @no-save1() #0 { ret void }
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define void @no-save2() #0 { ret void }
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define void @reg-save() #0 { ret void }
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define void @stack-save() #0 { ret void }
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attributes #0 = { minsize noinline noredzone "no-frame-pointer-elim"="true" }
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...
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---
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name: no-save1
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $lr
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$lr = ORRXri $xzr, 1
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bb.1:
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; CHECK-LABEL: name: no-save1
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; CHECK: BL [[FN:@OUTLINED_FUNCTION_[0-9]+]]
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; CHECK-NOT: STRXpre
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; CHECK-NOT: $lr =
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; CHECK-NOT: ORRXrs
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$x12 = ADDXri $sp, 48, 0;
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$x12 = ADDXri $sp, 48, 0;
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$x12 = ADDXri $sp, 48, 0;
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$x12 = ADDXri $sp, 48, 0;
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$x12 = ADDXri $sp, 48, 0;
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bb.2:
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RET undef $lr
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...
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---
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name: no-save2
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $lr
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$lr = ORRXri $xzr, 1
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bb.1:
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; CHECK-LABEL: name: no-save2
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; CHECK: BL [[FN]]
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; CHECK-NOT: STRXpre
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; CHECK-NOT: $lr =
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; CHECK-NOT: ORRXrs
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$x12 = ADDXri $sp, 48, 0;
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$x12 = ADDXri $sp, 48, 0;
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$x12 = ADDXri $sp, 48, 0;
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$x12 = ADDXri $sp, 48, 0;
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$x12 = ADDXri $sp, 48, 0;
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bb.2:
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RET undef $lr
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...
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---
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name: reg-save
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $lr
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$lr = ORRXri $xzr, 1
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bb.1:
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liveins: $lr
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; CHECK-LABEL: name: reg-save
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; CHECK: $[[REG:x[0-9]+]] = ORRXrs $xzr, $lr, 0
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; CHECK-NEXT: BL [[FN]]
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; CHECK-NEXT: $lr = ORRXrs $xzr, $[[REG]], 0
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$x12 = ADDXri $sp, 48, 0;
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$x12 = ADDXri $sp, 48, 0;
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$x12 = ADDXri $sp, 48, 0;
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$x12 = ADDXri $sp, 48, 0;
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$x12 = ADDXri $sp, 48, 0;
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bb.2:
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liveins: $lr
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RET undef $lr
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||||
|
||||
...
|
||||
---
|
||||
|
||||
name: stack-save
|
||||
tracksRegLiveness: true
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x18, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
|
||||
$lr = ORRXri $xzr, 1
|
||||
bb.1:
|
||||
liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x18, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
|
||||
; CHECK-LABEL: name: stack-save
|
||||
; CHECK-NOT: BL
|
||||
$x12 = ADDXri $sp, 48, 0;
|
||||
$x12 = ADDXri $sp, 48, 0;
|
||||
$x12 = ADDXri $sp, 48, 0;
|
||||
$x12 = ADDXri $sp, 48, 0;
|
||||
$x12 = ADDXri $sp, 48, 0;
|
||||
bb.2:
|
||||
liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x18, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
|
||||
RET undef $lr
|
||||
Loading…
Reference in New Issue
Block a user