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[GlobalISel] combine G_TRUNC with G_MERGE_VALUES
Summary: Truncating the result of a merge means that most likely we could have done without merge in the first place and just used the input merge inputs directly. This can be done in three cases: 1. If the truncation result is smaller than the merge source, we can use the source in the trunc directly 2. If the sizes are the same, we can replace the register or use a copy 3. If the truncation size is a multiple of the merge source size, we can build a smaller merge This gets rid of most of the larger, hard-to-legalize merges. Reviewers: qcolombet, aditya_nandakumar, aemerson, paquette, arsenm, Petar.Avramovic Reviewed By: arsenm Subscribers: sdardis, jvesely, wdng, nhaehnle, rovka, jrtc27, atanasyan, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D75915
This commit is contained in:
Dominik Montada
parent
6ce69c69c6
commit
7d30aae116
@ -167,7 +167,8 @@ public:
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bool tryCombineTrunc(MachineInstr &MI,
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SmallVectorImpl<MachineInstr *> &DeadInsts,
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SmallVectorImpl<Register> &UpdatedDefs) {
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SmallVectorImpl<Register> &UpdatedDefs,
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GISelObserverWrapper &Observer) {
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assert(MI.getOpcode() == TargetOpcode::G_TRUNC);
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Builder.setInstr(MI);
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@ -189,6 +190,66 @@ public:
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}
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}
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// Try to fold trunc(merge) to directly use the source of the merge.
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// This gets rid of large, difficult to legalize, merges
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if (SrcMI->getOpcode() == TargetOpcode::G_MERGE_VALUES) {
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const Register MergeSrcReg = SrcMI->getOperand(1).getReg();
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const LLT MergeSrcTy = MRI.getType(MergeSrcReg);
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const LLT DstTy = MRI.getType(DstReg);
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// We can only fold if the types are scalar
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const unsigned DstSize = DstTy.getSizeInBits();
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const unsigned MergeSrcSize = MergeSrcTy.getSizeInBits();
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if (!DstTy.isScalar() || !MergeSrcTy.isScalar())
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return false;
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if (DstSize < MergeSrcSize) {
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// When the merge source is larger than the destination, we can just
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// truncate the merge source directly
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if (isInstUnsupported({TargetOpcode::G_TRUNC, {DstTy, MergeSrcTy}}))
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return false;
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LLVM_DEBUG(dbgs() << "Combining G_TRUNC(G_MERGE_VALUES) to G_TRUNC: "
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<< MI);
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Builder.buildTrunc(DstReg, MergeSrcReg);
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UpdatedDefs.push_back(DstReg);
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} else if (DstSize == MergeSrcSize) {
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// If the sizes match we can simply try to replace the register
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LLVM_DEBUG(
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dbgs() << "Replacing G_TRUNC(G_MERGE_VALUES) with merge input: "
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<< MI);
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replaceRegOrBuildCopy(DstReg, MergeSrcReg, MRI, Builder, UpdatedDefs,
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Observer);
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} else if (DstSize % MergeSrcSize == 0) {
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// If the trunc size is a multiple of the merge source size we can use
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// a smaller merge instead
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if (isInstUnsupported(
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{TargetOpcode::G_MERGE_VALUES, {DstTy, MergeSrcTy}}))
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return false;
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LLVM_DEBUG(
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dbgs() << "Combining G_TRUNC(G_MERGE_VALUES) to G_MERGE_VALUES: "
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<< MI);
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const unsigned NumSrcs = DstSize / MergeSrcSize;
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assert(NumSrcs < SrcMI->getNumOperands() - 1 &&
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"trunc(merge) should require less inputs than merge");
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SmallVector<Register, 2> SrcRegs(NumSrcs);
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for (unsigned i = 0; i < NumSrcs; ++i)
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SrcRegs[i] = SrcMI->getOperand(i + 1).getReg();
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Builder.buildMerge(DstReg, SrcRegs);
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UpdatedDefs.push_back(DstReg);
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} else {
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// Unable to combine
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return false;
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}
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markInstAndDefDead(MI, *SrcMI, DeadInsts);
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return true;
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}
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return false;
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}
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@ -533,7 +594,7 @@ public:
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Changed = tryCombineExtract(MI, DeadInsts, UpdatedDefs);
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break;
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case TargetOpcode::G_TRUNC:
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Changed = tryCombineTrunc(MI, DeadInsts, UpdatedDefs);
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Changed = tryCombineTrunc(MI, DeadInsts, UpdatedDefs, WrapperObserver);
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if (!Changed) {
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// Try to combine truncates away even if they are legal. As all artifact
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// combines at the moment look only "up" the def-use chains, we achieve
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@ -8,9 +8,7 @@ body: |
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; CHECK-LABEL: name: test_implicit_def
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; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[DEF]](s64), [[DEF]](s64)
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; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[MV]](s128)
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; CHECK: $x0 = COPY [[TRUNC]](s64)
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; CHECK: $x0 = COPY [[DEF]](s64)
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%0:_(s128) = G_IMPLICIT_DEF
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%1:_(s64) = G_TRUNC %0(s128)
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$x0 = COPY %1(s64)
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136
test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-trunc.mir
Normal file
136
test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-trunc.mir
Normal file
@ -0,0 +1,136 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck %s
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---
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name: trunc_s16_merge_s64_s32
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body: |
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bb.0:
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; Test that trunc(merge) with trunc-size < merge-source-size creates a trunc
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; of the merge source
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; CHECK-LABEL: name: trunc_s16_merge_s64_s32
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: $vgpr0 = COPY [[C]](s32)
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%0:_(s32) = G_CONSTANT i32 0
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%1:_(s32) = G_CONSTANT i32 1
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%2:_(s64) = G_MERGE_VALUES %0, %1
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%3:_(s16) = G_TRUNC %2
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%4:_(s32) = G_ANYEXT %3
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$vgpr0 = COPY %4
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...
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---
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name: trunc_s32_merge_s64_s32
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body: |
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bb.0:
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; Test that trunc(merge) with trunc-size == merge-source-size is eliminated
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; CHECK-LABEL: name: trunc_s32_merge_s64_s32
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: $vgpr0 = COPY [[C]](s32)
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%0:_(s32) = G_CONSTANT i32 0
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%1:_(s32) = G_CONSTANT i32 1
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%2:_(s64) = G_MERGE_VALUES %0, %1
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%3:_(s32) = G_TRUNC %2
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$vgpr0 = COPY %3
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...
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---
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name: trunc_s64_merge_s128_s32
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body: |
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bb.0:
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; Test that trunc(merge) with trunc-size > merge-source-size combines to a
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; smaller merge
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; CHECK-LABEL: name: trunc_s64_merge_s128_s32
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C1]](s32)
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; CHECK: $vgpr0_vgpr1 = COPY [[MV]](s64)
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%0:_(s32) = G_CONSTANT i32 0
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%1:_(s32) = G_CONSTANT i32 1
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%2:_(s128) = G_MERGE_VALUES %0, %1, %0, %1
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%3:_(s64) = G_TRUNC %2
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$vgpr0_vgpr1 = COPY %3
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...
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---
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name: trunc_s32_merge_s128_p0
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body: |
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bb.0:
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; Test that trunc(merge) with a non-scalar merge source is not combined
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; CHECK-LABEL: name: trunc_s32_merge_s128_p0
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; CHECK: [[C:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
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; CHECK: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 1
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; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C]](p0), [[C1]](p0)
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; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s128)
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; CHECK: $vgpr0 = COPY [[TRUNC]](s32)
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%0:_(p0) = G_CONSTANT i64 0
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%1:_(p0) = G_CONSTANT i64 1
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%2:_(s128) = G_MERGE_VALUES %0, %1
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%3:_(s32) = G_TRUNC %2
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$vgpr0 = COPY %3
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...
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---
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name: trunc_s64_merge_s128_p0
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body: |
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bb.0:
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; Test that trunc(merge) with a non-scalar merge source is not combined
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; CHECK-LABEL: name: trunc_s64_merge_s128_p0
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; CHECK: [[C:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
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; CHECK: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 1
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; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C]](p0), [[C1]](p0)
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; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[MV]](s128)
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; CHECK: $vgpr0_vgpr1 = COPY [[TRUNC]](s64)
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%0:_(p0) = G_CONSTANT i64 0
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%1:_(p0) = G_CONSTANT i64 1
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%2:_(s128) = G_MERGE_VALUES %0, %1
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%3:_(s64) = G_TRUNC %2
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$vgpr0_vgpr1 = COPY %3
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...
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---
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name: trunc_s128_merge_s192_p0
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body: |
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bb.0:
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; Test that trunc(merge) with a non-scalar merge source is not combined
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; CHECK-LABEL: name: trunc_s128_merge_s192_p0
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; CHECK: [[C:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
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; CHECK: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 1
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; CHECK: [[MV:%[0-9]+]]:_(s192) = G_MERGE_VALUES [[C]](p0), [[C1]](p0), [[C]](p0)
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; CHECK: [[TRUNC:%[0-9]+]]:_(s128) = G_TRUNC [[MV]](s192)
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; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[TRUNC]](s128)
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%0:_(p0) = G_CONSTANT i64 0
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%1:_(p0) = G_CONSTANT i64 1
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%2:_(s192) = G_MERGE_VALUES %0, %1, %0
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%3:_(s128) = G_TRUNC %2
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %3
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...
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---
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name: trunc_s68_merge_s128_s32
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body: |
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bb.0:
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; Test that trunc(merge) with trunc-size > merge-source-size is not combined
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; if trunc-size % merge-source-size != 0
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; CHECK-LABEL: name: trunc_s68_merge_s128_s32
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C]](s32), [[C1]](s32), [[C]](s32), [[C1]](s32)
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; CHECK: [[TRUNC:%[0-9]+]]:_(s68) = G_TRUNC [[MV]](s128)
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; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[TRUNC]](s68)
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; CHECK: $vgpr0 = COPY [[TRUNC1]](s32)
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%0:_(s32) = G_CONSTANT i32 0
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%1:_(s32) = G_CONSTANT i32 1
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%2:_(s128) = G_MERGE_VALUES %0, %1, %0, %1
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%3:_(s68) = G_TRUNC %2
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%4:_(s32) = G_TRUNC %3
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$vgpr0 = COPY %4
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...
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@ -292,19 +292,17 @@ body: |
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; CHECK-LABEL: name: test_bitcast_s24_to_v3s8
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32)
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; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
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; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[DEF1]](s64)
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[TRUNC1]](s32)
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; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[TRUNC]](s32)
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; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[DEF1]](s64)
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
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; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
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; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC]], [[C]](s32)
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; CHECK: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)
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; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
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; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)
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; CHECK: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
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; CHECK: [[LSHR1:%[0-9]+]]:_(s16) = G_LSHR [[TRUNC2]], [[C1]](s16)
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; CHECK: [[LSHR2:%[0-9]+]]:_(s16) = G_LSHR [[TRUNC3]], [[C1]](s16)
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
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; CHECK: [[LSHR1:%[0-9]+]]:_(s16) = G_LSHR [[TRUNC1]], [[C1]](s16)
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; CHECK: [[LSHR2:%[0-9]+]]:_(s16) = G_LSHR [[TRUNC2]], [[C1]](s16)
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[LSHR1]](s16)
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; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
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; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
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@ -328,23 +326,21 @@ body: |
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; CHECK-LABEL: name: test_bitcast_s48_to_v3s16
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
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; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32)
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; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
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; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[DEF]](s64)
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[TRUNC1]](s32)
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; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[DEF]](s64)
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
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; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC]], [[C]](s32)
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; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC1]], [[C]](s32)
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; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32)
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; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC]], [[C]](s32)
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]]
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; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
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; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]]
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; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32)
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
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; CHECK: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
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; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[TRUNC1]](s32)
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; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
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; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]]
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; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[C2]], [[C]](s32)
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@ -207,13 +207,8 @@ body: |
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; CHECK: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C1]](s64)
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; CHECK: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]]
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; CHECK: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]]
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; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)
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; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295
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; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY [[MV]](s64)
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; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY [[C2]](s64)
|
||||
; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[COPY3]]
|
||||
; CHECK: [[COPY4:%[0-9]+]]:_(s64) = COPY [[AND1]](s64)
|
||||
; CHECK: $vgpr0_vgpr1 = COPY [[COPY4]](s64)
|
||||
; CHECK: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[USUBO]](s32)
|
||||
; CHECK: $vgpr0_vgpr1 = COPY [[ZEXT1]](s64)
|
||||
%0:_(s64) = COPY $vgpr0_vgpr1
|
||||
%1:_(s33) = G_TRUNC %0
|
||||
%2:_(s33) = G_CTLZ_ZERO_UNDEF %1
|
||||
|
||||
@ -253,13 +253,8 @@ body: |
|
||||
; CHECK: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C3]](s64)
|
||||
; CHECK: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]]
|
||||
; CHECK: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]]
|
||||
; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)
|
||||
; CHECK: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295
|
||||
; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY [[MV]](s64)
|
||||
; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY [[C4]](s64)
|
||||
; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[COPY3]]
|
||||
; CHECK: [[COPY4:%[0-9]+]]:_(s64) = COPY [[AND1]](s64)
|
||||
; CHECK: $vgpr0_vgpr1 = COPY [[COPY4]](s64)
|
||||
; CHECK: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[USUBO]](s32)
|
||||
; CHECK: $vgpr0_vgpr1 = COPY [[ZEXT1]](s64)
|
||||
%0:_(s64) = COPY $vgpr0_vgpr1
|
||||
%1:_(s33) = G_TRUNC %0
|
||||
%2:_(s33) = G_CTLZ %1
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -233,31 +233,29 @@ body: |
|
||||
; CHECK-LABEL: name: test_unmerge_s8_s48
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
|
||||
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
|
||||
; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32)
|
||||
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
|
||||
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
|
||||
; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[DEF]](s64)
|
||||
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[DEF]](s64)
|
||||
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
||||
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC]], [[C]](s32)
|
||||
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC1]], [[C]](s32)
|
||||
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32)
|
||||
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC]], [[C]](s32)
|
||||
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
|
||||
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
||||
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
|
||||
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
|
||||
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C2]]
|
||||
; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[COPY1]](s32)
|
||||
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
|
||||
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
|
||||
; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C2]]
|
||||
; CHECK: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], [[COPY3]](s32)
|
||||
; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[TRUNC1]](s32)
|
||||
; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
|
||||
; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C2]]
|
||||
; CHECK: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[AND2]], [[C1]](s32)
|
||||
; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
|
||||
; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
|
||||
; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32)
|
||||
; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
|
||||
; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32)
|
||||
; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY [[TRUNC1]](s32)
|
||||
; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
|
||||
; CHECK: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32)
|
||||
; CHECK: $vgpr0 = COPY [[COPY6]](s32)
|
||||
; CHECK: $vgpr1 = COPY [[COPY7]](s32)
|
||||
@ -290,16 +288,14 @@ body: |
|
||||
; CHECK-LABEL: name: test_unmerge_s16_s48
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
|
||||
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
|
||||
; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32)
|
||||
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
|
||||
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
|
||||
; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[DEF]](s64)
|
||||
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[DEF]](s64)
|
||||
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
||||
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC]], [[C]](s32)
|
||||
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC1]], [[C]](s32)
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
|
||||
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32)
|
||||
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC]], [[C]](s32)
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
|
||||
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
|
||||
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[TRUNC1]](s32)
|
||||
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
|
||||
; CHECK: $vgpr0 = COPY [[COPY1]](s32)
|
||||
; CHECK: $vgpr1 = COPY [[COPY2]](s32)
|
||||
; CHECK: $vgpr2 = COPY [[COPY3]](s32)
|
||||
|
||||
@ -692,25 +692,23 @@ body: |
|
||||
; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[C4]], [[SHL1]]
|
||||
; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32)
|
||||
; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
|
||||
; CHECK: [[MV1:%[0-9]+]]:_(s448) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64)
|
||||
; CHECK: [[TRUNC1:%[0-9]+]]:_(s128) = G_TRUNC [[MV1]](s448)
|
||||
; CHECK: [[EXTRACT:%[0-9]+]]:_(s64) = G_EXTRACT [[TRUNC1]](s128), 0
|
||||
; CHECK: [[EXTRACT1:%[0-9]+]]:_(s48) = G_EXTRACT [[TRUNC1]](s128), 64
|
||||
; CHECK: [[COPY5:%[0-9]+]]:_(s128) = COPY [[INSERT1]](s128)
|
||||
; CHECK: [[EXTRACT2:%[0-9]+]]:_(s64) = G_EXTRACT [[COPY5]](s128), 0
|
||||
; CHECK: [[EXTRACT3:%[0-9]+]]:_(s48) = G_EXTRACT [[COPY5]](s128), 64
|
||||
; CHECK: [[AND2:%[0-9]+]]:_(s64) = G_AND [[EXTRACT]], [[EXTRACT2]]
|
||||
; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[EXTRACT1]](s48)
|
||||
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[EXTRACT3]](s48)
|
||||
; CHECK: [[COPY5:%[0-9]+]]:_(s64) = COPY [[MV]](s64)
|
||||
; CHECK: [[EXTRACT:%[0-9]+]]:_(s48) = G_EXTRACT [[DEF1]](s64), 0
|
||||
; CHECK: [[COPY6:%[0-9]+]]:_(s128) = COPY [[INSERT1]](s128)
|
||||
; CHECK: [[EXTRACT1:%[0-9]+]]:_(s64) = G_EXTRACT [[COPY6]](s128), 0
|
||||
; CHECK: [[EXTRACT2:%[0-9]+]]:_(s48) = G_EXTRACT [[COPY6]](s128), 64
|
||||
; CHECK: [[AND2:%[0-9]+]]:_(s64) = G_AND [[COPY5]], [[EXTRACT1]]
|
||||
; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[EXTRACT]](s48)
|
||||
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[EXTRACT2]](s48)
|
||||
; CHECK: [[AND3:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[ANYEXT1]]
|
||||
; CHECK: [[TRUNC2:%[0-9]+]]:_(s48) = G_TRUNC [[AND3]](s64)
|
||||
; CHECK: [[TRUNC1:%[0-9]+]]:_(s48) = G_TRUNC [[AND3]](s64)
|
||||
; CHECK: [[DEF2:%[0-9]+]]:_(s128) = G_IMPLICIT_DEF
|
||||
; CHECK: [[COPY6:%[0-9]+]]:_(s128) = COPY [[DEF2]](s128)
|
||||
; CHECK: [[INSERT2:%[0-9]+]]:_(s128) = G_INSERT [[COPY6]], [[AND2]](s64), 0
|
||||
; CHECK: [[COPY7:%[0-9]+]]:_(s128) = COPY [[INSERT2]](s128)
|
||||
; CHECK: [[INSERT3:%[0-9]+]]:_(s128) = G_INSERT [[COPY7]], [[TRUNC2]](s48), 64
|
||||
; CHECK: [[TRUNC3:%[0-9]+]]:_(s112) = G_TRUNC [[INSERT3]](s128)
|
||||
; CHECK: S_ENDPGM 0, implicit [[TRUNC3]](s112)
|
||||
; CHECK: [[COPY7:%[0-9]+]]:_(s128) = COPY [[DEF2]](s128)
|
||||
; CHECK: [[INSERT2:%[0-9]+]]:_(s128) = G_INSERT [[COPY7]], [[AND2]](s64), 0
|
||||
; CHECK: [[COPY8:%[0-9]+]]:_(s128) = COPY [[INSERT2]](s128)
|
||||
; CHECK: [[INSERT3:%[0-9]+]]:_(s128) = G_INSERT [[COPY8]], [[TRUNC1]](s48), 64
|
||||
; CHECK: [[TRUNC2:%[0-9]+]]:_(s112) = G_TRUNC [[INSERT3]](s128)
|
||||
; CHECK: S_ENDPGM 0, implicit [[TRUNC2]](s112)
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s2) = G_TRUNC %0
|
||||
%2:_(s112) = G_ZEXT %1
|
||||
|
||||
@ -525,8 +525,7 @@ body: |
|
||||
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
|
||||
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
|
||||
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
||||
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32)
|
||||
; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY1]](s32)
|
||||
; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
|
||||
; MIPS32: $v0 = COPY [[LSHR]](s32)
|
||||
; MIPS32: RetRA implicit $v0
|
||||
%0:_(s32) = COPY $a0
|
||||
@ -707,27 +706,26 @@ body: |
|
||||
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
|
||||
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
|
||||
; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
|
||||
; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
|
||||
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
|
||||
; MIPS32: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY4]], [[C]]
|
||||
; MIPS32: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY4]]
|
||||
; MIPS32: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY2]], [[C]]
|
||||
; MIPS32: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY2]]
|
||||
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
||||
; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY4]](s32), [[C]]
|
||||
; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY4]](s32), [[C1]]
|
||||
; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY4]](s32)
|
||||
; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY2]](s32), [[C]]
|
||||
; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY2]](s32), [[C1]]
|
||||
; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY2]](s32)
|
||||
; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[SUB1]](s32)
|
||||
; MIPS32: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[COPY4]](s32)
|
||||
; MIPS32: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[COPY2]](s32)
|
||||
; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL1]]
|
||||
; MIPS32: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[SUB]](s32)
|
||||
; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
|
||||
; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
|
||||
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C2]]
|
||||
; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
|
||||
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C2]]
|
||||
; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[SHL]], [[C1]]
|
||||
; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
|
||||
; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C2]]
|
||||
; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
|
||||
; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C2]]
|
||||
; MIPS32: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), [[OR]], [[SHL2]]
|
||||
; MIPS32: [[COPY7:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32)
|
||||
; MIPS32: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C2]]
|
||||
; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32)
|
||||
; MIPS32: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C2]]
|
||||
; MIPS32: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[COPY1]], [[SELECT1]]
|
||||
; MIPS32: $v0 = COPY [[SELECT]](s32)
|
||||
; MIPS32: $v1 = COPY [[SELECT2]](s32)
|
||||
@ -759,29 +757,28 @@ body: |
|
||||
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
|
||||
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
|
||||
; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
|
||||
; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
|
||||
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
|
||||
; MIPS32: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY4]], [[C]]
|
||||
; MIPS32: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY4]]
|
||||
; MIPS32: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY2]], [[C]]
|
||||
; MIPS32: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY2]]
|
||||
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
||||
; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY4]](s32), [[C]]
|
||||
; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY4]](s32), [[C1]]
|
||||
; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[COPY4]](s32)
|
||||
; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY4]](s32)
|
||||
; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY2]](s32), [[C]]
|
||||
; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY2]](s32), [[C1]]
|
||||
; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[COPY2]](s32)
|
||||
; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY2]](s32)
|
||||
; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[SUB1]](s32)
|
||||
; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL]]
|
||||
; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
|
||||
; MIPS32: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[C2]](s32)
|
||||
; MIPS32: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[SUB]](s32)
|
||||
; MIPS32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
|
||||
; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
|
||||
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]]
|
||||
; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
|
||||
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]]
|
||||
; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[OR]], [[ASHR2]]
|
||||
; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32)
|
||||
; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]]
|
||||
; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32)
|
||||
; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]]
|
||||
; MIPS32: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), [[COPY]], [[SELECT]]
|
||||
; MIPS32: [[COPY7:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
|
||||
; MIPS32: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]]
|
||||
; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
|
||||
; MIPS32: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]]
|
||||
; MIPS32: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[ASHR]], [[ASHR1]]
|
||||
; MIPS32: $v0 = COPY [[SELECT1]](s32)
|
||||
; MIPS32: $v1 = COPY [[SELECT2]](s32)
|
||||
@ -813,27 +810,26 @@ body: |
|
||||
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
|
||||
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
|
||||
; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
|
||||
; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
|
||||
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
|
||||
; MIPS32: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY4]], [[C]]
|
||||
; MIPS32: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY4]]
|
||||
; MIPS32: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY2]], [[C]]
|
||||
; MIPS32: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY2]]
|
||||
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
||||
; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY4]](s32), [[C]]
|
||||
; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY4]](s32), [[C1]]
|
||||
; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[COPY4]](s32)
|
||||
; MIPS32: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY4]](s32)
|
||||
; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY2]](s32), [[C]]
|
||||
; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY2]](s32), [[C1]]
|
||||
; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[COPY2]](s32)
|
||||
; MIPS32: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY2]](s32)
|
||||
; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[SUB1]](s32)
|
||||
; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR1]], [[SHL]]
|
||||
; MIPS32: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[SUB]](s32)
|
||||
; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
|
||||
; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
|
||||
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C2]]
|
||||
; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
|
||||
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C2]]
|
||||
; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[OR]], [[LSHR2]]
|
||||
; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32)
|
||||
; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C2]]
|
||||
; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32)
|
||||
; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C2]]
|
||||
; MIPS32: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), [[COPY]], [[SELECT]]
|
||||
; MIPS32: [[COPY7:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
|
||||
; MIPS32: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C2]]
|
||||
; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
|
||||
; MIPS32: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C2]]
|
||||
; MIPS32: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[LSHR]], [[C1]]
|
||||
; MIPS32: $v0 = COPY [[SELECT1]](s32)
|
||||
; MIPS32: $v1 = COPY [[SELECT2]](s32)
|
||||
|
||||
@ -17,8 +17,7 @@ body: |
|
||||
; MIPS32: liveins: $a0, $a1
|
||||
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
|
||||
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
|
||||
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
|
||||
; MIPS32: $v0 = COPY [[COPY2]](s32)
|
||||
; MIPS32: $v0 = COPY [[COPY]](s32)
|
||||
; MIPS32: RetRA implicit $v0
|
||||
%1:_(s32) = COPY $a0
|
||||
%2:_(s32) = COPY $a1
|
||||
|
||||
@ -218,8 +218,7 @@ body: |
|
||||
; MIPS32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 4 from %ir.px)
|
||||
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
|
||||
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
||||
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32)
|
||||
; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[LOAD]], [[COPY1]](s32)
|
||||
; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[LOAD]], [[C]](s32)
|
||||
; MIPS32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[ASHR]](s32)
|
||||
; MIPS32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV]](s64)
|
||||
; MIPS32: $v0 = COPY [[UV]](s32)
|
||||
|
||||
@ -44,8 +44,7 @@ body: |
|
||||
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
|
||||
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
|
||||
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
||||
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32)
|
||||
; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[COPY1]](s32)
|
||||
; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)
|
||||
; MIPS32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[ASHR]](s32)
|
||||
; MIPS32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV]](s64)
|
||||
; MIPS32: $v0 = COPY [[UV]](s32)
|
||||
|
||||
@ -114,8 +114,7 @@ define i64 @load4_s32_to_sextLoad4_s64(i32* %px) {
|
||||
; MIPS32-LABEL: load4_s32_to_sextLoad4_s64:
|
||||
; MIPS32: # %bb.0: # %entry
|
||||
; MIPS32-NEXT: lw $1, 0($4)
|
||||
; MIPS32-NEXT: ori $2, $zero, 31
|
||||
; MIPS32-NEXT: srav $3, $1, $2
|
||||
; MIPS32-NEXT: sra $3, $1, 31
|
||||
; MIPS32-NEXT: move $2, $1
|
||||
; MIPS32-NEXT: jr $ra
|
||||
; MIPS32-NEXT: nop
|
||||
|
||||
@ -16,8 +16,7 @@ entry:
|
||||
define i64 @sext(i32 %x) {
|
||||
; MIPS32-LABEL: sext:
|
||||
; MIPS32: # %bb.0: # %entry
|
||||
; MIPS32-NEXT: ori $1, $zero, 31
|
||||
; MIPS32-NEXT: srav $3, $4, $1
|
||||
; MIPS32-NEXT: sra $3, $4, 31
|
||||
; MIPS32-NEXT: move $2, $4
|
||||
; MIPS32-NEXT: jr $ra
|
||||
; MIPS32-NEXT: nop
|
||||
|
||||
Loading…
Reference in New Issue
Block a user