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[AArch64] [Windows] SEH opcodes should be scheduling boundaries.
Prevents the post-RA scheduler from modifying the prologue sequences emitting by frame lowering. This is roughly similar to what we do for other targets: TargetInstrInfo::isSchedulingBoundary checks isPosition(), which checks for CFI_INSTRUCTION. isSEHInstruction is taken from D50288; it'll land with whatever patch lands first. Differential Revision: https://reviews.llvm.org/D53851 llvm-svn: 345634
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@ -1085,6 +1085,32 @@ bool AArch64InstrInfo::isFalkorShiftExtFast(const MachineInstr &MI) const {
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}
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}
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bool AArch64InstrInfo::isSEHInstruction(const MachineInstr &MI) {
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unsigned Opc = MI.getOpcode();
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switch (Opc) {
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default:
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return false;
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case AArch64::SEH_StackAlloc:
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case AArch64::SEH_SaveFPLR:
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case AArch64::SEH_SaveFPLR_X:
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case AArch64::SEH_SaveReg:
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case AArch64::SEH_SaveReg_X:
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case AArch64::SEH_SaveRegP:
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case AArch64::SEH_SaveRegP_X:
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case AArch64::SEH_SaveFReg:
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case AArch64::SEH_SaveFReg_X:
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case AArch64::SEH_SaveFRegP:
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case AArch64::SEH_SaveFRegP_X:
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case AArch64::SEH_SetFP:
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case AArch64::SEH_AddFP:
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case AArch64::SEH_Nop:
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case AArch64::SEH_PrologEnd:
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case AArch64::SEH_EpilogStart:
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case AArch64::SEH_EpilogEnd:
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return true;
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}
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}
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bool AArch64InstrInfo::isCoalescableExtInstr(const MachineInstr &MI,
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unsigned &SrcReg, unsigned &DstReg,
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unsigned &SubIdx) const {
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@ -1137,6 +1163,14 @@ bool AArch64InstrInfo::areMemAccessesTriviallyDisjoint(
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return false;
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}
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bool AArch64InstrInfo::isSchedulingBoundary(const MachineInstr &MI,
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const MachineBasicBlock *MBB,
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const MachineFunction &MF) const {
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if (TargetInstrInfo::isSchedulingBoundary(MI, MBB, MF))
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return true;
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return isSEHInstruction(MI);
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}
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/// analyzeCompare - For a comparison instruction, return the source registers
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/// in SrcReg and SrcReg2, and the value it compares against in CmpValue.
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/// Return true if the comparison instruction can be analyzed.
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@ -189,6 +189,10 @@ public:
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unsigned FalseReg) const override;
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void getNoop(MCInst &NopInst) const override;
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bool isSchedulingBoundary(const MachineInstr &MI,
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const MachineBasicBlock *MBB,
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const MachineFunction &MF) const override;
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/// analyzeCompare - For a comparison instruction, return the source registers
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/// in SrcReg and SrcReg2, and the value it compares against in CmpValue.
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/// Return true if the comparison instruction can be analyzed.
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@ -262,6 +266,9 @@ public:
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/// Returns true if the instruction has a shift by immediate that can be
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/// executed in one cycle less.
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bool isFalkorShiftExtFast(const MachineInstr &MI) const;
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/// Return true if the instructions is a SEH instruciton used for unwinding
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/// on Windows.
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static bool isSEHInstruction(const MachineInstr &MI);
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private:
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/// Sets the offsets on outlined instructions in \p MBB which use SP
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@ -1,4 +1,4 @@
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# RUN: llc -o - %s -mtriple=aarch64-windows -start-after=prologepilog -filetype=obj -disable-post-ra \
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# RUN: llc -o - %s -mtriple=aarch64-windows -start-after=prologepilog -filetype=obj \
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# RUN: | llvm-readobj -unwind | FileCheck %s
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# This test case checks the basic validity of the .xdata section. It's
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# documented at:
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@ -1,5 +1,5 @@
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# RUN: llc -o - %s -mtriple=aarch64-windows -start-after=prologepilog \
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# RUN: -disable-post-ra -filetype=obj | llvm-readobj -unwind | FileCheck %s
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# RUN: -filetype=obj | llvm-readobj -unwind | FileCheck %s
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# Test that the pre/post increment save of a flating point register is correct.
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# CHECK: ExceptionData {
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@ -1,5 +1,5 @@
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# RUN: llc -o - %s -mtriple=aarch64-windows -start-after=prologepilog \
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# RUN: -disable-post-ra -filetype=obj | llvm-readobj -unwind | FileCheck %s
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# RUN: -filetype=obj | llvm-readobj -unwind | FileCheck %s
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# Test that the register pairing of both general purpose and floating point
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# registers is correctly saved in the .xdata section, as well as the pre/post
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# increment of floating point register pairs.
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@ -1,5 +1,5 @@
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# RUN: llc -o - %s -mtriple=aarch64-windows -start-after=prologepilog \
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# RUN: -disable-branch-fold -disable-post-ra -filetype=obj \
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# RUN: -disable-branch-fold -filetype=obj \
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# RUN: | llvm-readobj -unwind | FileCheck %s
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# Check that multiple epilgoues are correctly placed in .xdata.
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@ -1,5 +1,5 @@
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# RUN: llc -o - %s -mtriple=aarch64-windows -start-after=prologepilog \
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# RUN: -disable-post-ra -filetype=obj | llvm-readobj -unwind | FileCheck %s
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# RUN: -filetype=obj | llvm-readobj -unwind | FileCheck %s
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# Check that that the large stack allocation is correctly represented in .xdata.
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@ -1,5 +1,5 @@
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# RUN: llc -o - %s -mtriple=aarch64-windows -start-after=prologepilog \
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# RUN: -disable-post-ra -filetype=obj | llvm-readobj -unwind | FileCheck %s
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# RUN: -filetype=obj | llvm-readobj -unwind | FileCheck %s
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# Check save_fplr_x, set_fp, alloc_s
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# CHECK: ExceptionData {
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@ -1,5 +1,5 @@
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# RUN: llc -o - %s -mtriple=aarch64-windows -start-after=prologepilog \
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# RUN: -filetype=obj -disable-post-ra | llvm-readobj -unwind | FileCheck %s
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# RUN: -filetype=obj | llvm-readobj -unwind | FileCheck %s
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# Check AddFP
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# CHECK: ExceptionData {
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