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ARM: respect tied 64-bit inlineasm operands when printing
The code for 'Q' and 'R' operand modifiers needs to look through tied operands to discover the register class. llvm-svn: 188990
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@ -496,6 +496,23 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
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if (!FlagsOP.isImm())
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return true;
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unsigned Flags = FlagsOP.getImm();
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// This operand may not be the one that actually provides the register. If
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// it's tied to a previous one then we should refer instead to that one
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// for registers and their classes.
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unsigned TiedIdx;
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if (InlineAsm::isUseOperandTiedToDef(Flags, TiedIdx)) {
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for (OpNum = InlineAsm::MIOp_FirstOperand; TiedIdx; --TiedIdx) {
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unsigned OpFlags = MI->getOperand(OpNum).getImm();
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OpNum += InlineAsm::getNumOperandRegisters(OpFlags) + 1;
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}
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Flags = MI->getOperand(OpNum).getImm();
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// Later code expects OpNum to be pointing at the register rather than
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// the flags.
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OpNum += 1;
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}
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unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
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unsigned RC;
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InlineAsm::hasRegClassConstraint(Flags, RC);
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@ -94,3 +94,13 @@ define i64 @tied_64bit_test(i64 %in) nounwind {
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call void asm "OUT($0), IN($1)", "=*rm,0"(i64* %addr, i64 %in)
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ret i64 %in
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}
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; If we explicitly name a tied operand, then the code should lookup the operand
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; we were tied to for information about register class and so on.
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define i64 @tied_64bit_lookback_test(i64 %in) nounwind {
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; CHECK-LABEL: tied_64bit_lookback_test:
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; CHECK: OUTLO([[LO:r[0-9]+]]) OUTHI([[HI:r[0-9]+]]) INLO([[LO]]) INHI([[HI]])
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%vars = call {i64, i32, i64} asm "OUTLO(${2:Q}) OUTHI(${2:R}) INLO(${3:Q}) INHI(${3:R})", "=r,=r,=r,2"(i64 %in)
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%res = extractvalue {i64, i32, i64} %vars, 2
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ret i64 %res
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}
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