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Fix double load / store multiple encoding.

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llvm-svn: 81403
This commit is contained in:
Evan Cheng 2009-09-09 23:55:03 +00:00
parent 9975e8e31a
commit 7f25e554e4
2 changed files with 3 additions and 4 deletions
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2
lib/Target/ARM/ARMCodeEmitter.cpp
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@ -949,7 +949,7 @@ static unsigned getAddrModeUPBits(unsigned Mode) {
// DB - Decrement before - bit U = 0 and bit P = 1
switch (Mode) {
default: llvm_unreachable("Unknown addressing sub-mode!");
case ARM_AM::da: break;
case ARM_AM::da: break;
case ARM_AM::db: Binary |= 0x1 << ARMII::P_BitShift; break;
case ARM_AM::ia: Binary |= 0x1 << ARMII::U_BitShift; break;
case ARM_AM::ib: Binary |= 0x3 << ARMII::U_BitShift; break;

5
lib/Target/ARM/ARMInstrFormats.td
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@ -1070,7 +1070,7 @@ class ASI5<bits<4> opcod1, bits<2> opcod2, dag oops, dag iops,
}
// Load / store multiple
class AXSI5<dag oops, dag iops, InstrItinClass itin,
class AXDI5<dag oops, dag iops, InstrItinClass itin,
string asm, list<dag> pattern>
: VFPXI<oops, iops, AddrMode5, Size4Bytes, IndexModeNone,
VFPLdStMulFrm, itin, asm, "", pattern> {
@ -1079,7 +1079,7 @@ class AXSI5<dag oops, dag iops, InstrItinClass itin,
let Inst{11-8} = 0b1011;
}
class AXDI5<dag oops, dag iops, InstrItinClass itin,
class AXSI5<dag oops, dag iops, InstrItinClass itin,
string asm, list<dag> pattern>
: VFPXI<oops, iops, AddrMode5, Size4Bytes, IndexModeNone,
VFPLdStMulFrm, itin, asm, "", pattern> {
@ -1088,7 +1088,6 @@ class AXDI5<dag oops, dag iops, InstrItinClass itin,
let Inst{11-8} = 0b1010;
}
// Double precision, unary
class ADuI<bits<8> opcod1, bits<4> opcod2, bits<4> opcod3, dag oops, dag iops,
InstrItinClass itin, string opc, string asm, list<dag> pattern>