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[RDF] Improvements to copy propagation
- Allow any instruction to define equality between registers. - Keep the DFG updated. llvm-svn: 258075
This commit is contained in:
Krzysztof Parzyszek
parent
fa20b3ad96
commit
7ff439af60
@ -7,16 +7,17 @@
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//
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//===----------------------------------------------------------------------===//
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//
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// Simplistic RDF-based copy propagation.
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// RDF-based copy propagation.
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#include "RDFCopy.h"
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#include "RDFGraph.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Support/CommandLine.h"
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#include <atomic>
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#ifndef NDEBUG
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static cl::opt<unsigned> CpLimit("rdf-cp-limit", cl::init(0), cl::Hidden);
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@ -26,18 +27,66 @@ static unsigned CpCount = 0;
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using namespace llvm;
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using namespace rdf;
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void CopyPropagation::recordCopy(NodeAddr<StmtNode*> SA, MachineInstr *MI) {
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assert(MI->getOpcode() == TargetOpcode::COPY);
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const MachineOperand &Op0 = MI->getOperand(0), &Op1 = MI->getOperand(1);
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RegisterRef DstR = { Op0.getReg(), Op0.getSubReg() };
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RegisterRef SrcR = { Op1.getReg(), Op1.getSubReg() };
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auto FS = DefM.find(SrcR);
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if (FS == DefM.end() || FS->second.empty())
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return;
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bool CopyPropagation::interpretAsCopy(const MachineInstr *MI, EqualityMap &EM) {
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unsigned Opc = MI->getOpcode();
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switch (Opc) {
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case TargetOpcode::COPY: {
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const MachineOperand &Dst = MI->getOperand(0);
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const MachineOperand &Src = MI->getOperand(1);
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RegisterRef DstR = { Dst.getReg(), Dst.getSubReg() };
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RegisterRef SrcR = { Src.getReg(), Src.getSubReg() };
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if (TargetRegisterInfo::isVirtualRegister(DstR.Reg)) {
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if (!TargetRegisterInfo::isVirtualRegister(SrcR.Reg))
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return false;
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MachineRegisterInfo &MRI = DFG.getMF().getRegInfo();
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if (MRI.getRegClass(DstR.Reg) != MRI.getRegClass(SrcR.Reg))
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return false;
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} else if (TargetRegisterInfo::isPhysicalRegister(DstR.Reg)) {
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if (!TargetRegisterInfo::isPhysicalRegister(SrcR.Reg))
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return false;
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const TargetRegisterInfo &TRI = DFG.getTRI();
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if (TRI.getMinimalPhysRegClass(DstR.Reg) !=
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TRI.getMinimalPhysRegClass(SrcR.Reg))
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return false;
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} else {
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// Copy between some unknown objects.
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return false;
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}
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EM.insert(std::make_pair(DstR, SrcR));
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return true;
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}
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case TargetOpcode::REG_SEQUENCE: {
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const MachineOperand &Dst = MI->getOperand(0);
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RegisterRef DefR = { Dst.getReg(), Dst.getSubReg() };
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SmallVector<TargetInstrInfo::RegSubRegPairAndIdx,2> Inputs;
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const TargetInstrInfo &TII = DFG.getTII();
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if (!TII.getRegSequenceInputs(*MI, 0, Inputs))
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return false;
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for (auto I : Inputs) {
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unsigned S = DFG.getTRI().composeSubRegIndices(DefR.Sub, I.SubIdx);
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RegisterRef DR = { DefR.Reg, S };
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RegisterRef SR = { I.Reg, I.SubReg };
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EM.insert(std::make_pair(DR, SR));
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}
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return true;
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}
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}
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return false;
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}
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void CopyPropagation::recordCopy(NodeAddr<StmtNode*> SA, EqualityMap &EM) {
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CopyMap.insert(std::make_pair(SA.Id, EM));
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Copies.push_back(SA.Id);
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RDefMap[SrcR][SA.Id] = FS->second.top()->Id;
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// Insert DstR into the map.
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RDefMap[DstR];
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for (auto I : EM) {
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auto FS = DefM.find(I.second);
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if (FS == DefM.end() || FS->second.empty())
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continue; // Undefined source
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RDefMap[I.second][SA.Id] = FS->second.top()->Id;
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// Insert DstR into the map.
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RDefMap[I.first];
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}
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}
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@ -74,9 +123,9 @@ bool CopyPropagation::scanBlock(MachineBasicBlock *B) {
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for (NodeAddr<InstrNode*> IA : BA.Addr->members(DFG)) {
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if (DFG.IsCode<NodeAttrs::Stmt>(IA)) {
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NodeAddr<StmtNode*> SA = IA;
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MachineInstr *MI = SA.Addr->getCode();
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if (MI->isCopy())
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recordCopy(SA, MI);
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EqualityMap EM;
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if (interpretAsCopy(SA.Addr->getCode(), EM))
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recordCopy(SA, EM);
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}
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updateMap(IA);
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@ -97,8 +146,14 @@ bool CopyPropagation::run() {
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if (trace()) {
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dbgs() << "Copies:\n";
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for (auto I : Copies)
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dbgs() << *DFG.addr<StmtNode*>(I).Addr->getCode();
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for (auto I : Copies) {
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dbgs() << "Instr: " << *DFG.addr<StmtNode*>(I).Addr->getCode();
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dbgs() << " eq: {";
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for (auto J : CopyMap[I])
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dbgs() << ' ' << Print<RegisterRef>(J.first, DFG) << '='
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<< Print<RegisterRef>(J.second, DFG);
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dbgs() << " }\n";
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}
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dbgs() << "\nRDef map:\n";
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for (auto R : RDefMap) {
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dbgs() << Print<RegisterRef>(R.first, DFG) << " -> {";
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@ -110,70 +165,82 @@ bool CopyPropagation::run() {
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}
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bool Changed = false;
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NodeSet Deleted;
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#ifndef NDEBUG
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bool HasLimit = CpLimit.getNumOccurrences() > 0;
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#endif
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for (auto I : Copies) {
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for (auto C : Copies) {
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#ifndef NDEBUG
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if (HasLimit && CpCount >= CpLimit)
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break;
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#endif
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if (Deleted.count(I))
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auto SA = DFG.addr<InstrNode*>(C);
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auto FS = CopyMap.find(SA.Id);
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if (FS == CopyMap.end())
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continue;
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auto SA = DFG.addr<InstrNode*>(I);
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NodeList Ds = SA.Addr->members_if(DFG.IsDef, DFG);
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if (Ds.size() != 1)
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continue;
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NodeAddr<DefNode*> DA = Ds[0];
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RegisterRef DR0 = DA.Addr->getRegRef();
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NodeList Us = SA.Addr->members_if(DFG.IsUse, DFG);
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if (Us.size() != 1)
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continue;
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NodeAddr<UseNode*> UA0 = Us[0];
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RegisterRef UR0 = UA0.Addr->getRegRef();
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NodeId RD0 = UA0.Addr->getReachingDef();
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for (NodeId N = DA.Addr->getReachedUse(), NextN; N; N = NextN) {
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auto UA = DFG.addr<UseNode*>(N);
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NextN = UA.Addr->getSibling();
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uint16_t F = UA.Addr->getFlags();
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if ((F & NodeAttrs::PhiRef) || (F & NodeAttrs::Fixed))
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EqualityMap &EM = FS->second;
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for (NodeAddr<DefNode*> DA : SA.Addr->members_if(DFG.IsDef, DFG)) {
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RegisterRef DR = DA.Addr->getRegRef();
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auto FR = EM.find(DR);
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if (FR == EM.end())
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continue;
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if (UA.Addr->getRegRef() != DR0)
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RegisterRef SR = FR->second;
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if (DR == SR)
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continue;
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NodeAddr<InstrNode*> IA = UA.Addr->getOwner(DFG);
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assert(DFG.IsCode<NodeAttrs::Stmt>(IA));
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MachineInstr *MI = NodeAddr<StmtNode*>(IA).Addr->getCode();
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if (RDefMap[UR0][IA.Id] != RD0)
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continue;
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MachineOperand &Op = UA.Addr->getOp();
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if (Op.isTied())
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continue;
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if (trace()) {
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dbgs() << "can replace " << Print<RegisterRef>(DR0, DFG)
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<< " with " << Print<RegisterRef>(UR0, DFG) << " in "
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<< *NodeAddr<StmtNode*>(IA).Addr->getCode();
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}
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Op.setReg(UR0.Reg);
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Op.setSubReg(UR0.Sub);
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Changed = true;
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#ifndef NDEBUG
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if (HasLimit && CpCount >= CpLimit)
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break;
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CpCount++;
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#endif
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auto &RDefSR = RDefMap[SR];
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NodeId RDefSR_SA = RDefSR[SA.Id];
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if (MI->isCopy()) {
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MachineOperand &Op0 = MI->getOperand(0), &Op1 = MI->getOperand(1);
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if (Op0.getReg() == Op1.getReg() && Op0.getSubReg() == Op1.getSubReg())
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MI->eraseFromParent();
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Deleted.insert(IA.Id);
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}
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}
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}
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for (NodeId N = DA.Addr->getReachedUse(), NextN; N; N = NextN) {
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auto UA = DFG.addr<UseNode*>(N);
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NextN = UA.Addr->getSibling();
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uint16_t F = UA.Addr->getFlags();
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if ((F & NodeAttrs::PhiRef) || (F & NodeAttrs::Fixed))
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continue;
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if (UA.Addr->getRegRef() != DR)
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continue;
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NodeAddr<InstrNode*> IA = UA.Addr->getOwner(DFG);
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assert(DFG.IsCode<NodeAttrs::Stmt>(IA));
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if (RDefSR[IA.Id] != RDefSR_SA)
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continue;
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MachineOperand &Op = UA.Addr->getOp();
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if (Op.isTied())
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continue;
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if (trace()) {
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dbgs() << "Can replace " << Print<RegisterRef>(DR, DFG)
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<< " with " << Print<RegisterRef>(SR, DFG) << " in "
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<< *NodeAddr<StmtNode*>(IA).Addr->getCode();
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}
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Op.setReg(SR.Reg);
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Op.setSubReg(SR.Sub);
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DFG.unlinkUse(UA, false);
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UA.Addr->linkToDef(UA.Id, DFG.addr<DefNode*>(RDefSR_SA));
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Changed = true;
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#ifndef NDEBUG
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if (HasLimit && CpCount >= CpLimit)
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break;
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CpCount++;
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#endif
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auto FC = CopyMap.find(IA.Id);
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if (FC != CopyMap.end()) {
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// Update the EM map in the copy's entry.
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auto &M = FC->second;
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for (auto &J : M) {
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if (J.second != DR)
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continue;
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J.second = SR;
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break;
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}
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}
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} // for (N in reached-uses)
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} // for (DA in defs)
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} // for (C in Copies)
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return Changed;
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}
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@ -24,11 +24,15 @@ namespace rdf {
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struct CopyPropagation {
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CopyPropagation(DataFlowGraph &dfg) : MDT(dfg.getDT()), DFG(dfg),
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Trace(false) {}
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virtual ~CopyPropagation() {}
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bool run();
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void trace(bool On) { Trace = On; }
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bool trace() const { return Trace; }
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typedef std::map<RegisterRef, RegisterRef> EqualityMap;
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virtual bool interpretAsCopy(const MachineInstr *MI, EqualityMap &EM);
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private:
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const MachineDominatorTree &MDT;
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DataFlowGraph &DFG;
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@ -37,9 +41,11 @@ namespace rdf {
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// map: register -> (map: stmt -> reaching def)
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std::map<RegisterRef,std::map<NodeId,NodeId>> RDefMap;
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// map: statement -> (map: dst reg -> src reg)
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std::map<NodeId, EqualityMap> CopyMap;
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std::vector<NodeId> Copies;
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void recordCopy(NodeAddr<StmtNode*> SA, MachineInstr *MI);
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void recordCopy(NodeAddr<StmtNode*> SA, EqualityMap &EM);
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void updateMap(NodeAddr<InstrNode*> IA);
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bool scanBlock(MachineBasicBlock *B);
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};
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