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Tidy up this rather crufty test. Put the declarations at the top to make

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my C-brain happy. Remove the unnecessary bits of pedantic IR fluff like
nounwind. Remove stray uses comments. Name things semantically rather
than tN so that adding a new test in the middle doesn't cause pain, and
so that new tests can be grouped semantically.

This exposes how little systematic testing is going on here. I noticed
this by finding several bugs via inspection and wondering why this test
wasn't catching any of them. =[

llvm-svn: 147248
This commit is contained in:
Chandler Carruth 2011-12-24 11:26:57 +00:00
parent facca1025b
commit 800a803717
1 changed files with 32 additions and 33 deletions
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65
test/CodeGen/X86/clz.ll
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@ -1,90 +1,89 @@
; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s
define i32 @t1(i32 %x) nounwind {
%tmp = tail call i32 @llvm.ctlz.i32( i32 %x, i1 true )
ret i32 %tmp
; CHECK: t1:
; CHECK: bsrl
; CHECK-NOT: cmov
; CHECK: xorl $31,
; CHECK: ret
}
declare i32 @llvm.cttz.i32(i32, i1)
declare i16 @llvm.ctlz.i16(i16, i1)
declare i32 @llvm.ctlz.i32(i32, i1)
declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
define i32 @t2(i32 %x) nounwind {
%tmp = tail call i32 @llvm.cttz.i32( i32 %x, i1 true )
define i32 @cttz_i32(i32 %x) {
%tmp = call i32 @llvm.cttz.i32( i32 %x, i1 true )
ret i32 %tmp
; CHECK: t2:
; CHECK: cttz_i32:
; CHECK: bsfl
; CHECK-NOT: cmov
; CHECK: ret
}
declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone
define i16 @t3(i16 %x, i16 %y) nounwind {
define i16 @ctlz_i16(i16 %x, i16 %y) {
entry:
%tmp1 = add i16 %x, %y
%tmp2 = tail call i16 @llvm.ctlz.i16( i16 %tmp1, i1 true ) ; <i16> [#uses=1]
%tmp2 = call i16 @llvm.ctlz.i16( i16 %tmp1, i1 true )
ret i16 %tmp2
; CHECK: t3:
; CHECK: ctlz_i16:
; CHECK: bsrw
; CHECK-NOT: cmov
; CHECK: xorl $15,
; CHECK: ret
}
declare i16 @llvm.ctlz.i16(i16, i1) nounwind readnone
define i32 @ctlz_i32(i32 %x) {
%tmp = call i32 @llvm.ctlz.i32( i32 %x, i1 true )
ret i32 %tmp
; CHECK: ctlz_i32:
; CHECK: bsrl
; CHECK-NOT: cmov
; CHECK: xorl $31,
; CHECK: ret
}
define i32 @t4(i32 %n) nounwind {
define i32 @ctlz_i32_cmov(i32 %n) {
entry:
; Generate a cmov to handle zero inputs when necessary.
; CHECK: t4:
; CHECK: ctlz_i32_cmov:
; CHECK: bsrl
; CHECK: cmov
; CHECK: xorl $31,
; CHECK: ret
%tmp1 = tail call i32 @llvm.ctlz.i32(i32 %n, i1 false)
%tmp1 = call i32 @llvm.ctlz.i32(i32 %n, i1 false)
ret i32 %tmp1
}
define i32 @t5(i32 %n) nounwind {
define i32 @ctlz_i32_fold_cmov(i32 %n) {
entry:
; Don't generate the cmovne when the source is known non-zero (and bsr would
; not set ZF).
; rdar://9490949
; CHECK: t5:
; CHECK: ctlz_i32_fold_cmov:
; CHECK: bsrl
; CHECK-NOT: cmov
; CHECK: xorl $31,
; CHECK: ret
%or = or i32 %n, 1
%tmp1 = tail call i32 @llvm.ctlz.i32(i32 %or, i1 false)
%tmp1 = call i32 @llvm.ctlz.i32(i32 %or, i1 false)
ret i32 %tmp1
}
define i32 @t6(i32 %n) nounwind {
define i32 @ctlz_bsr(i32 %n) {
entry:
; Don't generate any xors when a 'ctlz' intrinsic is actually used to compute
; the most significant bit, which is what 'bsr' does natively.
; CHECK: t6:
; CHECK: ctlz_bsr:
; CHECK: bsrl
; CHECK-NOT: xorl
; CHECK: ret
%ctlz = tail call i32 @llvm.ctlz.i32(i32 %n, i1 true)
%ctlz = call i32 @llvm.ctlz.i32(i32 %n, i1 true)
%bsr = xor i32 %ctlz, 31
ret i32 %bsr
}
define i32 @t7(i32 %n) nounwind {
define i32 @ctlz_bsr_cmov(i32 %n) {
entry:
; Same as t6, but ensure this happens even when there is a potential zero.
; CHECK: t7:
; Same as ctlz_bsr, but ensure this happens even when there is a potential
; zero.
; CHECK: ctlz_bsr_cmov:
; CHECK: bsrl
; CHECK-NOT: xorl
; CHECK: ret
%ctlz = tail call i32 @llvm.ctlz.i32(i32 %n, i1 false)
%ctlz = call i32 @llvm.ctlz.i32(i32 %n, i1 false)
%bsr = xor i32 %ctlz, 31
ret i32 %bsr
}