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Don't assume the registers will be enumerated sequentially.
llvm-svn: 182879
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6381fe608d
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@ -373,8 +373,11 @@ BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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Reserved.set(*AI);
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// XMM8, XMM9, ...
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assert(X86::XMM15 == X86::XMM8+7);
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for (MCRegAliasIterator AI(X86::XMM8 + n, this, true); AI.isValid(); ++AI)
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static const uint16_t XMMReg[] = {
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X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11,
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X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
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};
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for (MCRegAliasIterator AI(XMMReg[n], this, true); AI.isValid(); ++AI)
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Reserved.set(*AI);
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}
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}
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