RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-23 12:24:34 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Fix some bugs in the alpha backend, some of which I introduced yesterday,

Browse Source 
and some that were preexisting.  All alpha regtests pass now.

llvm-svn: 22829
This commit is contained in:
Chris Lattner 2005-08-17 17:08:24 +00:00
parent 2370cb4e85
commit 82abf46492
1 changed files with 3 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
lib/Target/Alpha/AlphaISelPattern.cpp
View File

@ -284,6 +284,7 @@ AlphaTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG)
case MVT::f32:
args_float[count] = AddLiveIn(MF,args_float[count], getRegClassFor(VT));
argt = DAG.getCopyFromReg(DAG.getRoot(), args_float[count], VT);
DAG.setRoot(argt.getValue(1));
break;
case MVT::i1:
case MVT::i8:
@ -292,12 +293,12 @@ AlphaTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG)
case MVT::i64:
args_int[count] = AddLiveIn(MF, args_int[count],
getRegClassFor(MVT::i64));
argt = DAG.getCopyFromReg(DAG.getRoot(), args_int[count], VT);
argt = DAG.getCopyFromReg(DAG.getRoot(), args_int[count], MVT::i64);
DAG.setRoot(argt.getValue(1));
if (VT != MVT::i64)
argt = DAG.getNode(ISD::TRUNCATE, VT, argt);
break;
}
DAG.setRoot(argt.getValue(1));
} else { //more args
// Create the frame index object for this incoming parameter...
int FI = MFI->CreateFixedObject(8, 8 * (count - 6));