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Delete dead PHI machine instructions. These can be created due to type
legalization even when the IR-level optimizer has removed dead phis, such as when the high half of an i64 value is unused on a 32-bit target. I had to adjust a few test cases that had dead phis. This is a partial fix for Radar 7627077. llvm-svn: 95816
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@ -55,7 +55,7 @@ FunctionPass *llvm::createDeadMachineInstructionElimPass() {
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bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
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bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
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// Don't delete instructions with side effects.
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// Don't delete instructions with side effects.
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bool SawStore = false;
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bool SawStore = false;
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if (!MI->isSafeToMove(TII, SawStore, 0))
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if (!MI->isSafeToMove(TII, SawStore, 0) && !MI->isPHI())
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return false;
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return false;
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// Examine each operand.
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// Examine each operand.
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@ -32,16 +32,16 @@ bb.i35: ; preds = %bb142
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br label %phi1.exit
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br label %phi1.exit
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phi1.exit: ; preds = %bb.i35, %bb142
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phi1.exit: ; preds = %bb.i35, %bb142
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%.pn = phi double [ %6, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=0]
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%.pn = phi double [ %6, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=1]
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%9 = phi double [ %8, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=1]
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%9 = phi double [ %8, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=1]
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%10 = fmul double undef, %9 ; <double> [#uses=0]
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%10 = fmul double %.pn, %9 ; <double> [#uses=1]
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br i1 %14, label %phi0.exit, label %bb.i
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br i1 %14, label %phi0.exit, label %bb.i
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bb.i: ; preds = %phi1.exit
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bb.i: ; preds = %phi1.exit
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unreachable
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unreachable
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phi0.exit: ; preds = %phi1.exit
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phi0.exit: ; preds = %phi1.exit
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%11 = fsub double %4, undef ; <double> [#uses=1]
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%11 = fsub double %4, %10 ; <double> [#uses=1]
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%12 = fadd double 0.000000e+00, %11 ; <double> [#uses=1]
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%12 = fadd double 0.000000e+00, %11 ; <double> [#uses=1]
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store double %12, double* undef, align 4
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store double %12, double* undef, align 4
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br label %bb142
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br label %bb142
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@ -36,7 +36,9 @@ bb.i6.i: ; preds = %bb.i6.i, %stepsystem.exit.i
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bb107.i.i: ; preds = %bb107.i.i, %bb.i6.i
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bb107.i.i: ; preds = %bb107.i.i, %bb.i6.i
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%q_addr.0.i.i.in = phi %struct.bnode** [ null, %bb107.i.i ], [ %4, %bb.i6.i ] ; <%struct.bnode**> [#uses=1]
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%q_addr.0.i.i.in = phi %struct.bnode** [ null, %bb107.i.i ], [ %4, %bb.i6.i ] ; <%struct.bnode**> [#uses=1]
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%q_addr.0.i.i = load %struct.bnode** %q_addr.0.i.i.in ; <%struct.bnode*> [#uses=0]
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%q_addr.0.i.i = load %struct.bnode** %q_addr.0.i.i.in ; <%struct.bnode*> [#uses=1]
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%q_addr.1 = getelementptr %struct.anon* %0, i32 0, i32 4, i32 1
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store %struct.bnode* %q_addr.0.i.i, %struct.bnode** %q_addr.1, align 4
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br label %bb107.i.i
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br label %bb107.i.i
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bb47.loopexit.i: ; preds = %bb32.i
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bb47.loopexit.i: ; preds = %bb32.i
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