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Get rid of RegScavenger::backwards() before the bitrot spreads.
If we need it one day, there is nothing wrong with putting it back in. llvm-svn: 78337
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@ -90,20 +90,15 @@ public:
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/// passes over/within the same function.
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void initRegState();
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/// forward / backward - Move the internal MBB iterator and update register
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/// states.
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/// forward - Move the internal MBB iterator and update register states.
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void forward();
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void backward();
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/// forward / backward - Move the internal MBB iterator and update register
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/// states until it has processed the specific iterator.
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/// forward - Move the internal MBB iterator and update register states until
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/// it has processed the specific iterator.
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void forward(MachineBasicBlock::iterator I) {
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if (!Tracking && MBB->begin() != I) forward();
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while (MBBI != I) forward();
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}
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void backward(MachineBasicBlock::iterator I) {
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while (MBBI != I) backward();
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}
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/// skipTo - Move the internal MBB iterator but do not update register states.
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///
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@ -294,70 +294,6 @@ void RegScavenger::forward() {
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}
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}
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void RegScavenger::backward() {
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assert(Tracking && "Not tracking states!");
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assert(MBBI != MBB->begin() && "Already at start of basic block!");
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// Move ptr backward.
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MBBI = prior(MBBI);
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MachineInstr *MI = MBBI;
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DistanceMap.erase(MI);
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--CurrDist;
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// Separate register operands into 3 classes: uses, defs, earlyclobbers.
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SmallVector<std::pair<const MachineOperand*,unsigned>, 4> UseMOs;
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SmallVector<std::pair<const MachineOperand*,unsigned>, 4> DefMOs;
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SmallVector<std::pair<const MachineOperand*,unsigned>, 4> EarlyClobberMOs;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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if (!MO.isReg() || MO.getReg() == 0 || MO.isUndef())
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continue;
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if (MO.isUse())
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UseMOs.push_back(std::make_pair(&MO,i));
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else if (MO.isEarlyClobber())
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EarlyClobberMOs.push_back(std::make_pair(&MO,i));
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else
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DefMOs.push_back(std::make_pair(&MO,i));
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}
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// Process defs first.
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unsigned NumECs = EarlyClobberMOs.size();
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unsigned NumDefs = DefMOs.size();
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for (unsigned i = 0, e = NumECs + NumDefs; i != e; ++i) {
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const MachineOperand &MO = (i < NumDefs)
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? *DefMOs[i].first : *EarlyClobberMOs[i-NumDefs].first;
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unsigned Idx = (i < NumECs)
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? DefMOs[i].second : EarlyClobberMOs[i-NumDefs].second;
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if (MO.isUndef())
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continue;
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// Skip two-address destination operand.
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if (MI->isRegTiedToUseOperand(Idx))
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continue;
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unsigned Reg = MO.getReg();
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assert(isUsed(Reg));
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if (!isReserved(Reg))
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setUnused(Reg, MI);
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}
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// Process uses.
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BitVector UseRegs(NumPhysRegs);
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for (unsigned i = 0, e = UseMOs.size(); i != e; ++i) {
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const MachineOperand MO = *UseMOs[i].first;
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unsigned Reg = MO.getReg();
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assert(isUnused(Reg) || isReserved(Reg));
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UseRegs.set(Reg);
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// Set the sub-registers as "used".
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for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
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unsigned SubReg = *SubRegs; ++SubRegs)
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UseRegs.set(SubReg);
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}
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setUsed(UseRegs);
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}
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void RegScavenger::getRegsUsed(BitVector &used, bool includeReserved) {
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if (includeReserved)
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used = ~RegsAvailable;
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