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Partial fix to r225380 (More FMA folding opportunities)
As pointed out by Aditya (and Owen), there are two things wrong with this code. First, it adds patterns which elide FP extends when forming FMAs, and that might not be profitable on all targets (it belongs behind the pre-existing aggressive-FMA-formation flag). This is fixed by this change. Second, the resulting nodes might have operands of different types (the extensions need to be re-added). That will be fixed in the follow-up commit. llvm-svn: 225485
This commit is contained in:
Hal Finkel
parent
fa69fc81ba
commit
87302ccea9
@ -6898,51 +6898,50 @@ SDValue DAGCombiner::visitFADD(SDNode *N) {
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return DAG.getNode(ISD::FMA, SDLoc(N), VT,
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N1.getOperand(0), N1.getOperand(1), N0);
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// Remove FP_EXTEND when there is an opportunity to combine. This is
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// legal here since extra precision is allowed.
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// fold (fadd (fpext (fmul x, y)), z) -> (fma x, y, z)
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if (N0.getOpcode() == ISD::FP_EXTEND) {
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SDValue N00 = N0.getOperand(0);
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if (N00.getOpcode() == ISD::FMUL)
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// More folding opportunities when target permits.
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if (TLI.enableAggressiveFMAFusion(VT)) {
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// fold (fadd (fma x, y, (fmul u, v)), z) -> (fma x, y (fma u, v, z))
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if (N0.getOpcode() == ISD::FMA &&
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N0.getOperand(2).getOpcode() == ISD::FMUL)
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return DAG.getNode(ISD::FMA, SDLoc(N), VT,
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N00.getOperand(0), N00.getOperand(1), N1);
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}
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N0.getOperand(0), N0.getOperand(1),
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DAG.getNode(ISD::FMA, SDLoc(N), VT,
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N0.getOperand(2).getOperand(0),
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N0.getOperand(2).getOperand(1),
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N1));
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// fold (fadd x, (fpext (fmul y, z)), z) -> (fma y, z, x)
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// Note: Commutes FADD operands.
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if (N1.getOpcode() == ISD::FP_EXTEND) {
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SDValue N10 = N1.getOperand(0);
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if (N10.getOpcode() == ISD::FMUL)
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// fold (fadd x, (fma y, z, (fmul u, v)) -> (fma y, z (fma u, v, x))
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if (N1->getOpcode() == ISD::FMA &&
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N1.getOperand(2).getOpcode() == ISD::FMUL)
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return DAG.getNode(ISD::FMA, SDLoc(N), VT,
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N10.getOperand(0), N10.getOperand(1), N0);
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N1.getOperand(0), N1.getOperand(1),
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DAG.getNode(ISD::FMA, SDLoc(N), VT,
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N1.getOperand(2).getOperand(0),
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N1.getOperand(2).getOperand(1),
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N0));
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// Remove FP_EXTEND when there is an opportunity to combine. This is
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// legal here since extra precision is allowed.
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// fold (fadd (fpext (fmul x, y)), z) -> (fma x, y, z)
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if (N0.getOpcode() == ISD::FP_EXTEND) {
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SDValue N00 = N0.getOperand(0);
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if (N00.getOpcode() == ISD::FMUL)
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return DAG.getNode(ISD::FMA, SDLoc(N), VT,
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N00.getOperand(0), N00.getOperand(1), N1);
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}
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// fold (fadd x, (fpext (fmul y, z)), z) -> (fma y, z, x)
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// Note: Commutes FADD operands.
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if (N1.getOpcode() == ISD::FP_EXTEND) {
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SDValue N10 = N1.getOperand(0);
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if (N10.getOpcode() == ISD::FMUL)
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return DAG.getNode(ISD::FMA, SDLoc(N), VT,
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N10.getOperand(0), N10.getOperand(1), N0);
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}
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}
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}
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// More folding opportunities when target permits.
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if (TLI.enableAggressiveFMAFusion(VT)) {
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// fold (fadd (fma x, y, (fmul u, v)), z) -> (fma x, y (fma u, v, z))
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if (N0.getOpcode() == ISD::FMA &&
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N0.getOperand(2).getOpcode() == ISD::FMUL)
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return DAG.getNode(ISD::FMA, SDLoc(N), VT,
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N0.getOperand(0), N0.getOperand(1),
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DAG.getNode(ISD::FMA, SDLoc(N), VT,
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N0.getOperand(2).getOperand(0),
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N0.getOperand(2).getOperand(1),
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N1));
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// fold (fadd x, (fma y, z, (fmul u, v)) -> (fma y, z (fma u, v, x))
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if (N1->getOpcode() == ISD::FMA &&
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N1.getOperand(2).getOpcode() == ISD::FMUL)
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return DAG.getNode(ISD::FMA, SDLoc(N), VT,
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N1.getOperand(0), N1.getOperand(1),
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DAG.getNode(ISD::FMA, SDLoc(N), VT,
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N1.getOperand(2).getOperand(0),
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N1.getOperand(2).getOperand(1),
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N0));
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}
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return SDValue();
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}
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@ -7035,63 +7034,6 @@ SDValue DAGCombiner::visitFSUB(SDNode *N) {
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DAG.getNode(ISD::FNEG, dl, VT, N1));
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}
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// Remove FP_EXTEND when there is an opportunity to combine. This is
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// legal here since extra precision is allowed.
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// fold (fsub (fpext (fmul x, y)), z) -> (fma x, y, (fneg z))
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if (N0.getOpcode() == ISD::FP_EXTEND) {
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SDValue N00 = N0.getOperand(0);
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if (N00.getOpcode() == ISD::FMUL)
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return DAG.getNode(ISD::FMA, SDLoc(N), VT,
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N00.getOperand(0),
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N00.getOperand(1),
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DAG.getNode(ISD::FNEG, SDLoc(N), VT, N1));
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}
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// fold (fsub x, (fpext (fmul y, z))) -> (fma (fneg y), z, x)
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// Note: Commutes FSUB operands.
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if (N1.getOpcode() == ISD::FP_EXTEND) {
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SDValue N10 = N1.getOperand(0);
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if (N10.getOpcode() == ISD::FMUL)
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return DAG.getNode(ISD::FMA, SDLoc(N), VT,
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DAG.getNode(ISD::FNEG, SDLoc(N), VT,
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N10.getOperand(0)),
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N10.getOperand(1),
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N0);
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}
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// fold (fsub (fpext (fneg (fmul, x, y))), z)
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// -> (fma (fneg x), y, (fneg z))
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if (N0.getOpcode() == ISD::FP_EXTEND) {
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SDValue N00 = N0.getOperand(0);
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if (N00.getOpcode() == ISD::FNEG) {
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SDValue N000 = N00.getOperand(0);
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if (N000.getOpcode() == ISD::FMUL) {
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return DAG.getNode(ISD::FMA, dl, VT,
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DAG.getNode(ISD::FNEG, dl, VT,
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N000.getOperand(0)),
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N000.getOperand(1),
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DAG.getNode(ISD::FNEG, dl, VT, N1));
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}
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}
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}
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// fold (fsub (fneg (fpext (fmul, x, y))), z)
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// -> (fma (fneg x), y, (fneg z))
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if (N0.getOpcode() == ISD::FNEG) {
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SDValue N00 = N0.getOperand(0);
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if (N00.getOpcode() == ISD::FP_EXTEND) {
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SDValue N000 = N00.getOperand(0);
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if (N000.getOpcode() == ISD::FMUL) {
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return DAG.getNode(ISD::FMA, dl, VT,
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DAG.getNode(ISD::FNEG, dl, VT,
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N000.getOperand(0)),
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N000.getOperand(1),
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DAG.getNode(ISD::FNEG, dl, VT, N1));
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}
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}
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}
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// More folding opportunities when target permits.
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if (TLI.enableAggressiveFMAFusion(VT)) {
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@ -7122,6 +7064,63 @@ SDValue DAGCombiner::visitFSUB(SDNode *N) {
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N20),
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N21, N0));
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}
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// Remove FP_EXTEND when there is an opportunity to combine. This is
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// legal here since extra precision is allowed.
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// fold (fsub (fpext (fmul x, y)), z) -> (fma x, y, (fneg z))
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if (N0.getOpcode() == ISD::FP_EXTEND) {
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SDValue N00 = N0.getOperand(0);
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if (N00.getOpcode() == ISD::FMUL)
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return DAG.getNode(ISD::FMA, SDLoc(N), VT,
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N00.getOperand(0),
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N00.getOperand(1),
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DAG.getNode(ISD::FNEG, SDLoc(N), VT, N1));
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}
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// fold (fsub x, (fpext (fmul y, z))) -> (fma (fneg y), z, x)
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// Note: Commutes FSUB operands.
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if (N1.getOpcode() == ISD::FP_EXTEND) {
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SDValue N10 = N1.getOperand(0);
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if (N10.getOpcode() == ISD::FMUL)
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return DAG.getNode(ISD::FMA, SDLoc(N), VT,
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DAG.getNode(ISD::FNEG, SDLoc(N), VT,
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N10.getOperand(0)),
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N10.getOperand(1),
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N0);
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}
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// fold (fsub (fpext (fneg (fmul, x, y))), z)
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// -> (fma (fneg x), y, (fneg z))
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if (N0.getOpcode() == ISD::FP_EXTEND) {
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SDValue N00 = N0.getOperand(0);
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if (N00.getOpcode() == ISD::FNEG) {
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SDValue N000 = N00.getOperand(0);
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if (N000.getOpcode() == ISD::FMUL) {
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return DAG.getNode(ISD::FMA, dl, VT,
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DAG.getNode(ISD::FNEG, dl, VT,
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N000.getOperand(0)),
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N000.getOperand(1),
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DAG.getNode(ISD::FNEG, dl, VT, N1));
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}
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}
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}
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// fold (fsub (fneg (fpext (fmul, x, y))), z)
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// -> (fma (fneg x), y, (fneg z))
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if (N0.getOpcode() == ISD::FNEG) {
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SDValue N00 = N0.getOperand(0);
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if (N00.getOpcode() == ISD::FP_EXTEND) {
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SDValue N000 = N00.getOperand(0);
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if (N000.getOpcode() == ISD::FMUL) {
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return DAG.getNode(ISD::FMA, dl, VT,
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DAG.getNode(ISD::FNEG, dl, VT,
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N000.getOperand(0)),
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N000.getOperand(1),
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DAG.getNode(ISD::FNEG, dl, VT, N1));
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}
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}
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}
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}
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}
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