Comment from code review

llvm-svn: 151178
This commit is contained in:
Andrew Trick 2012-02-22 18:34:49 +00:00
parent 3703a1917a
commit 8827848788

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@ -362,6 +362,7 @@ void ScheduleDAGInstrs::addVRegDefDeps(SUnit *SU, unsigned OperIdx) {
unsigned Reg = MI->getOperand(OperIdx).getReg();
// SSA defs do not have output/anti dependencies.
// The current operand is a def, so we have at least one.
if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end())
return;